mirror of https://github.com/acidanthera/audk.git
125 lines
3.2 KiB
ArmAsm
125 lines
3.2 KiB
ArmAsm
#
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# Copyright (c) 2014, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials are licensed and made available
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# under the terms and conditions of the BSD License which accompanies this
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# distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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#include <AsmMacroIoLibV8.h>
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#if !defined(__clang__)
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//
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// Clang versions before v3.6 do not support the GNU extension that allows
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// system registers outside of the IMPLEMENTATION DEFINED range to be specified
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// using the generic notation below. However, clang knows these registers by
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// their architectural names, so it has no need for these aliases anyway.
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//
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#define ICC_SRE_EL1 S3_0_C12_C12_5
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#define ICC_SRE_EL2 S3_4_C12_C9_5
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#define ICC_SRE_EL3 S3_6_C12_C12_5
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#define ICC_IGRPEN1_EL1 S3_0_C12_C12_7
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#define ICC_EOIR1_EL1 S3_0_C12_C12_1
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#define ICC_IAR1_EL1 S3_0_C12_C12_0
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#define ICC_PMR_EL1 S3_0_C4_C6_0
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#define ICC_BPR1_EL1 S3_0_C12_C12_3
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#endif
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.text
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.align 2
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GCC_ASM_EXPORT(ArmGicV3GetControlSystemRegisterEnable)
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GCC_ASM_EXPORT(ArmGicV3SetControlSystemRegisterEnable)
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GCC_ASM_EXPORT(ArmGicV3EnableInterruptInterface)
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GCC_ASM_EXPORT(ArmGicV3DisableInterruptInterface)
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GCC_ASM_EXPORT(ArmGicV3EndOfInterrupt)
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GCC_ASM_EXPORT(ArmGicV3AcknowledgeInterrupt)
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GCC_ASM_EXPORT(ArmGicV3SetPriorityMask)
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GCC_ASM_EXPORT(ArmGicV3SetBinaryPointer)
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//UINT32
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//EFIAPI
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//ArmGicV3GetControlSystemRegisterEnable (
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// VOID
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// );
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ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
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EL1_OR_EL2_OR_EL3(x1)
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1: mrs x0, ICC_SRE_EL1
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b 4f
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2: mrs x0, ICC_SRE_EL2
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b 4f
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3: mrs x0, ICC_SRE_EL3
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4: ret
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//VOID
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//EFIAPI
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//ArmGicV3SetControlSystemRegisterEnable (
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// IN UINT32 ControlSystemRegisterEnable
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// );
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ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
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EL1_OR_EL2_OR_EL3(x1)
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1: msr ICC_SRE_EL1, x0
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b 4f
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2: msr ICC_SRE_EL2, x0
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b 4f
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3: msr ICC_SRE_EL3, x0
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4: isb
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ret
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//VOID
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//ArmGicV3EnableInterruptInterface (
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// VOID
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// );
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ASM_PFX(ArmGicV3EnableInterruptInterface):
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mov x0, #1
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msr ICC_IGRPEN1_EL1, x0
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ret
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//VOID
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//ArmGicV3DisableInterruptInterface (
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// VOID
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// );
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ASM_PFX(ArmGicV3DisableInterruptInterface):
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mov x0, #0
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msr ICC_IGRPEN1_EL1, x0
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ret
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//VOID
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//ArmGicV3EndOfInterrupt (
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// IN UINTN InterruptId
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// );
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ASM_PFX(ArmGicV3EndOfInterrupt):
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msr ICC_EOIR1_EL1, x0
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ret
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//UINTN
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//ArmGicV3AcknowledgeInterrupt (
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// VOID
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// );
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ASM_PFX(ArmGicV3AcknowledgeInterrupt):
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mrs x0, ICC_IAR1_EL1
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ret
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//VOID
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//ArmGicV3SetPriorityMask (
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// IN UINTN Priority
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// );
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ASM_PFX(ArmGicV3SetPriorityMask):
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msr ICC_PMR_EL1, x0
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ret
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//VOID
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//ArmGicV3SetBinaryPointer (
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// IN UINTN BinaryPoint
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// );
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ASM_PFX(ArmGicV3SetBinaryPointer):
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msr ICC_BPR1_EL1, x0
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ret
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