Feng Tian e7e89b0861 MdeModulePkg/SdMmcPciHcDxe: Using PIO rather than DMA for clock tuning
The original code is using ADMA mode to do clock tuning procedure. It
may have problem on some SD/MMC host controllers as there is no way to
know when to send next tuning cmd.

Update it to PIO mode to strictly follow SD Host Controller Simplified
Specification 3.0 Figure 2-29. By this way, if the Buffer Read Ready
interrupt is set, we could know it's ok to send the next clock tuning
cmd.

Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06 16:09:59 +08:00
2014-10-14 16:08:15 +00:00
2016-04-22 00:55:21 -07:00
2014-10-14 16:08:15 +00:00
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Acidanthera UEFI Development Kit based on EDK II edk2-stable202405
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