audk/IntelSiliconPkg/Feature
Star Zeng e8097a74b7 IntelSiliconPkg IntelVTdPmrPei: Refine comments about PHMR/PLMR.Limit
According to VTd spec, the real hardware decoded limit should be
PHMR/PLMR.Limit value + alignment value.

"Bits N:0 of the limit register are
decoded by hardware as all 1s."

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2018-01-17 10:34:22 +08:00
..
Capsule IntelSiliconPkg MicrocodeUpdateDxe: Fix (ExtendedTableLength & 0x3)!=0 2017-12-21 18:34:55 +08:00
VTd IntelSiliconPkg IntelVTdPmrPei: Refine comments about PHMR/PLMR.Limit 2018-01-17 10:34:22 +08:00