mirror of https://github.com/acidanthera/audk.git
158 lines
3.9 KiB
C
158 lines
3.9 KiB
C
/** @file
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Uefi.h>
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#include <Library/BaseLib.h>
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#include <Library/TimerLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Library/IoLib.h>
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#include <Library/OmapLib.h>
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#include <Omap3530/Omap3530.h>
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RETURN_STATUS
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EFIAPI
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TimerConstructor (
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VOID
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)
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{
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UINTN Timer = PcdGet32(PcdOmap35xxFreeTimer);
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UINT32 TimerBaseAddress = TimerBase(Timer);
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if ((MmioRead32 (TimerBaseAddress + GPTIMER_TCLR) & TCLR_ST_ON) == 0) {
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// Set source clock for GPT3 & GPT4 to SYS_CLK
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MmioOr32 (CM_CLKSEL_PER, CM_CLKSEL_PER_CLKSEL_GPT3_SYS | CM_CLKSEL_PER_CLKSEL_GPT4_SYS);
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// Set count & reload registers
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MmioWrite32 (TimerBaseAddress + GPTIMER_TCRR, 0x00000000);
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MmioWrite32 (TimerBaseAddress + GPTIMER_TLDR, 0x00000000);
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// Disable interrupts
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MmioWrite32 (TimerBaseAddress + GPTIMER_TIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_DISABLE | TIER_MAT_IT_DISABLE);
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// Start Timer
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MmioWrite32 (TimerBaseAddress + GPTIMER_TCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);
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// Disable OMAP Watchdog timer (WDT2)
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MmioWrite32 (WDTIMER2_BASE + WSPR, 0xAAAA);
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DEBUG ((EFI_D_ERROR, "Magic delay to disable watchdog timers properly.\n"));
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MmioWrite32 (WDTIMER2_BASE + WSPR, 0x5555);
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}
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return EFI_SUCCESS;
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}
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UINTN
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EFIAPI
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MicroSecondDelay (
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IN UINTN MicroSeconds
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)
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{
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UINT64 NanoSeconds;
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NanoSeconds = MultU64x32(MicroSeconds, 1000);
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while (NanoSeconds > (UINTN)-1) {
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NanoSecondDelay((UINTN)-1);
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NanoSeconds -= (UINTN)-1;
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}
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NanoSecondDelay(NanoSeconds);
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return MicroSeconds;
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}
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UINTN
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EFIAPI
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NanoSecondDelay (
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IN UINTN NanoSeconds
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)
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{
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UINT32 Delay;
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UINT32 StartTime;
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UINT32 CurrentTime;
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UINT32 ElapsedTime;
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UINT32 TimerCountRegister;
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Delay = (NanoSeconds / PcdGet32(PcdEmbeddedPerformanceCounterPeriodInNanoseconds)) + 1;
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TimerCountRegister = TimerBase(PcdGet32(PcdOmap35xxFreeTimer)) + GPTIMER_TCRR;
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StartTime = MmioRead32 (TimerCountRegister);
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do
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{
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CurrentTime = MmioRead32 (TimerCountRegister);
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ElapsedTime = CurrentTime - StartTime;
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} while (ElapsedTime < Delay);
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NanoSeconds = ElapsedTime * PcdGet32(PcdEmbeddedPerformanceCounterPeriodInNanoseconds);
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return NanoSeconds;
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}
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UINT64
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EFIAPI
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GetPerformanceCounter (
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VOID
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)
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{
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return (UINT64)MmioRead32 (TimerBase(PcdGet32(PcdOmap35xxFreeTimer)) + GPTIMER_TCRR);
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}
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UINT64
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EFIAPI
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GetPerformanceCounterProperties (
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OUT UINT64 *StartValue, OPTIONAL
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OUT UINT64 *EndValue OPTIONAL
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)
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{
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if (StartValue != NULL) {
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// Timer starts with the reload value
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*StartValue = (UINT64)MmioRead32 (TimerBase(PcdGet32(PcdOmap35xxFreeTimer)) + GPTIMER_TLDR);
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}
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if (EndValue != NULL) {
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// Timer counts up to 0xFFFFFFFF
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*EndValue = 0xFFFFFFFF;
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}
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return PcdGet64(PcdEmbeddedPerformanceCounterFrequencyInHz);
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}
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/**
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Converts elapsed ticks of performance counter to time in nanoseconds.
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This function converts the elapsed ticks of running performance counter to
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time value in unit of nanoseconds.
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@param Ticks The number of elapsed ticks of running performance counter.
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@return The elapsed time in nanoseconds.
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**/
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UINT64
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EFIAPI
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GetTimeInNanoSecond (
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IN UINT64 Ticks
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)
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{
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UINT32 Period;
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Period = PcdGet32 (PcdEmbeddedPerformanceCounterPeriodInNanoseconds);
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return (Ticks * Period);
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}
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