Tan, Dun b670700ddf UefiCpuPkg/PiSmmCpuDxeSmm:Fix PF issue caused by smm page table code ... When setting new page table pool to RO, only disable/enable WP when Cr0.WP has been set to 1 to fix potential PF caused by b822be1a20 (UefiCpuPkg/PiSmmCpuDxeSmm: Introduce page table pool mechanism). With previous code, if someone want to modify the page table and Cr0.WP has been cleared before modify page table, Cr0.WP may be set to 1 again since new pool may be generated during this process Then PF fault may happens. Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com>		2023-01-03 06:41:11 +00:00
..
Ia32	UefiCpuPkg: Simplify the code to set smm page table as RO	2022-12-21 11:13:48 +00:00
X64	UefiCpuPkg: Simplify the code to set smm page table as RO	2022-12-21 11:13:48 +00:00
CpuS3.c	UefiCpuPkg: Supporting S3 in 64bit PEI	2022-12-19 06:12:56 +00:00
CpuService.c	…
CpuService.h	…
MpService.c	…
PiSmmCpuDxeSmm.c	UefiCpuPkg/PiSmmCpuDxeSmm: Introduce page table pool mechanism	2022-12-21 11:13:48 +00:00
PiSmmCpuDxeSmm.h	UefiCpuPkg: Simplify the code to set smm page table as RO	2022-12-21 11:13:48 +00:00
PiSmmCpuDxeSmm.inf	UefiCpuPkg: Supporting S3 in 64bit PEI	2022-12-19 06:12:56 +00:00
PiSmmCpuDxeSmm.uni	…
PiSmmCpuDxeSmmExtra.uni	…
SmmCpuMemoryManagement.c	UefiCpuPkg/PiSmmCpuDxeSmm:Fix PF issue caused by smm page table code	2023-01-03 06:41:11 +00:00
SmmMp.c	…
SmmMp.h	…
SmmProfile.c	…
SmmProfile.h	…
SmmProfileInternal.h	…
SmramSaveState.c	…
SyncTimer.c	…