mirror of https://github.com/acidanthera/audk.git
8df52631e5
The PL031 interrupt mask register (IMSC) is not very clearly documented in the PL031 specification. However, bit 0 (RTCIMSC) indicates whether interrupts are enabled, not disabled. So before this commit, we were actually *enabling* interrupts for the RTC. This patch changes the logic to instead disable interrupts when they are not disabled already. Signed-off-by: Alexander Graf <graf@amazon.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> |
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| .. | ||
| Drivers | ||
| Include/Library | ||
| Library | ||
| MemoryInitPei | ||
| PlatformPei | ||
| PrePeiCore | ||
| PrePi | ||
| Scripts | ||
| ArmPlatformPkg.dec | ||
| ArmPlatformPkg.dsc | ||