mirror of https://github.com/acidanthera/audk.git
c0959b4426
Replace the dummy C implementation of SpeculationBarrier() with implementations consisting of the recommended DSB SY + ISB sequence, as recommended by ARM in the whitepaper "Cache Speculation Side-channels" version 2.4, dated October 2018. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> |
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CpuBreakpoint.S | ||
CpuBreakpoint.asm | ||
DisableInterrupts.S | ||
DisableInterrupts.asm | ||
EnableInterrupts.S | ||
EnableInterrupts.asm | ||
GetInterruptsState.S | ||
GetInterruptsState.asm | ||
MemoryFence.S | ||
MemoryFence.asm | ||
SetJumpLongJump.S | ||
SetJumpLongJump.asm | ||
SpeculationBarrier.S | ||
SpeculationBarrier.asm | ||
SwitchStack.S | ||
SwitchStack.asm |