mirror of https://github.com/acidanthera/audk.git
42 lines
1.0 KiB
Plaintext
42 lines
1.0 KiB
Plaintext
PRM_CLKSRC_CTRL=0x00000080
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PRM_CLKSEL=0x00000003
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CM_CLKSEL1_EMU=0x03020A50
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CM_CLKSEL_CORE=0x0000030A
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CM_CLKSEL_WKUP=0x00000015
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CM_CLKEN_PLL_DPLL3=0x00370037
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CM_AUTOIDLE_PLL_DPLL3=0x00000000
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CM_CLKSEL1_PLL=0x094C0C00
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CM_CLKEN_PLL_DPLL4=0x00370037
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CM_AUTOIDLE_PLL_DPLL4=0x00000000
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CM_CLKSEL2_PLL=0x0001B00C
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CM_CLKSEL3_PLL=0x00000009
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CM_CLKEN_PLL_MPU=0x00000037
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CM_AUTOIDLE_PLL_MPU=0x00000000
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CM_CLKSEL1_PLL_MPU=0x0011F40C
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CM_CLKSEL2_PLL_MPU=0x00000001
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CM_CLKSTCTRL_MPU=0x00000000
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SDRC_SYSCONFIG_LSB=0x0000
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SDRC_CS_CFG_LSB=0x0001
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SDRC_SHARING_LSB=0x0100
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SDRC_ERR_TYPE_LSB=0x0000
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SDRC_DLLA_CTRL=0x0000000A
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SDRC_POWER=0x00000081
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MEMORY_TYPE_CS0=0x0003
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SDRC_MCFG_0=0x02D04011
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SDRC_MR_0_LSB=0x0032
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SDRC_EMR1_0_LSB=0x0000
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SDRC_EMR2_0_LSB=0x0000
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SDRC_EMR3_0_LSB=0x0000
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SDRC_ACTIM_CTRLA_0=0xBA9DC4C6
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SDRC_ACTIM_CTRLB_0=0x00012522
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SDRC_RFRCTRL_0=0x0004E201
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MEMORY_TYPE_CS1=0x0003
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SDRC_MCFG_1=0x02D04011
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SDRC_MR_1_LSB=0x0032
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SDRC_EMR1_1_LSB=0x0000
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SDRC_EMR2_1_LSB=0x0000
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SDRC_EMR3_1_LSB=0x0000
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SDRC_ACTIM_CTRLA_1=0xBA9DC4C6
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SDRC_ACTIM_CTRLB_1=0x00012522
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SDRC_RFRCTRL_1=0x0004E201
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