mirror of https://github.com/acidanthera/audk.git
672 lines
16 KiB
C
672 lines
16 KiB
C
/** @file
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*
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* Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
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* Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include "MmcHostDxe.h"
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EMBEDDED_EXTERNAL_DEVICE *gTPS65950;
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UINT8 mMaxDataTransferRate = 0;
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UINT32 mRca = 0;
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BOOLEAN mBitModeSet = FALSE;
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typedef struct {
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VENDOR_DEVICE_PATH Mmc;
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EFI_DEVICE_PATH End;
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} MMCHS_DEVICE_PATH;
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MMCHS_DEVICE_PATH gMMCDevicePath = {
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{
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{
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HARDWARE_DEVICE_PATH,
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HW_VENDOR_DP,
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{ (UINT8)(sizeof(VENDOR_DEVICE_PATH)), (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8) },
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},
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{ 0xb615f1f5, 0x5088, 0x43cd, { 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00 } }
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},
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{
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END_DEVICE_PATH_TYPE,
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END_ENTIRE_DEVICE_PATH_SUBTYPE,
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{ sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }
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}
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};
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BOOLEAN
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IgnoreCommand (
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UINT32 Command
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)
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{
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switch(Command) {
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case MMC_CMD12:
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return TRUE;
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case MMC_CMD13:
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return TRUE;
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default:
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return FALSE;
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}
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}
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UINT32
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TranslateCommand (
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UINT32 Command
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)
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{
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UINT32 Translation;
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switch(Command) {
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case MMC_CMD2:
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Translation = CMD2;
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break;
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case MMC_CMD3:
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Translation = CMD3;
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break;
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/*case MMC_CMD6:
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Translation = CMD6;
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break;*/
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case MMC_CMD7:
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Translation = CMD7;
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break;
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case MMC_CMD8:
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Translation = CMD8;
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break;
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case MMC_CMD9:
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Translation = CMD9;
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break;
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/*case MMC_CMD12:
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Translation = CMD12;
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break;
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case MMC_CMD13:
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Translation = CMD13;
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break;*/
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case MMC_CMD16:
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Translation = CMD16;
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break;
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case MMC_CMD17:
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Translation = 0x113A0014;//CMD17;
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break;
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case MMC_CMD24:
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Translation = CMD24 | 4;
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break;
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case MMC_CMD55:
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Translation = CMD55;
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break;
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case MMC_ACMD41:
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Translation = ACMD41;
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break;
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default:
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Translation = Command;
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}
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return Translation;
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}
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VOID
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CalculateCardCLKD (
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UINTN *ClockFrequencySelect
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)
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{
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UINTN TransferRateValue = 0;
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UINTN TimeValue = 0 ;
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UINTN Frequency = 0;
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DEBUG ((DEBUG_BLKIO, "CalculateCardCLKD()\n"));
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// For SD Cards we would need to send CMD6 to set
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// speeds abouve 25MHz. High Speed mode 50 MHz and up
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// Calculate Transfer rate unit (Bits 2:0 of TRAN_SPEED)
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switch (mMaxDataTransferRate & 0x7) { // 2
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case 0:
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TransferRateValue = 100 * 1000;
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break;
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case 1:
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TransferRateValue = 1 * 1000 * 1000;
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break;
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case 2:
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TransferRateValue = 10 * 1000 * 1000;
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break;
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case 3:
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TransferRateValue = 100 * 1000 * 1000;
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break;
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default:
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DEBUG ((DEBUG_BLKIO, "Invalid parameter.\n"));
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ASSERT(FALSE);
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return;
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}
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//Calculate Time value (Bits 6:3 of TRAN_SPEED)
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switch ((mMaxDataTransferRate >> 3) & 0xF) { // 6
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case 1:
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TimeValue = 10;
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break;
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case 2:
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TimeValue = 12;
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break;
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case 3:
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TimeValue = 13;
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break;
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case 4:
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TimeValue = 15;
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break;
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case 5:
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TimeValue = 20;
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break;
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case 6:
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TimeValue = 25;
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break;
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case 7:
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TimeValue = 30;
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break;
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case 8:
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TimeValue = 35;
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break;
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case 9:
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TimeValue = 40;
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break;
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case 10:
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TimeValue = 45;
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break;
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case 11:
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TimeValue = 50;
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break;
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case 12:
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TimeValue = 55;
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break;
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case 13:
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TimeValue = 60;
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break;
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case 14:
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TimeValue = 70;
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break;
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case 15:
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TimeValue = 80;
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break;
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default:
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DEBUG ((DEBUG_BLKIO, "Invalid parameter.\n"));
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ASSERT(FALSE);
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return;
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}
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Frequency = TransferRateValue * TimeValue/10;
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// Calculate Clock divider value to program in MMCHS_SYSCTL[CLKD] field.
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*ClockFrequencySelect = ((MMC_REFERENCE_CLK/Frequency) + 1);
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DEBUG ((DEBUG_BLKIO, "mMaxDataTransferRate: 0x%x, Frequency: %d KHz, ClockFrequencySelect: %x\n", mMaxDataTransferRate, Frequency/1000, *ClockFrequencySelect));
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}
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VOID
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UpdateMMCHSClkFrequency (
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UINTN NewCLKD
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)
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{
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DEBUG ((DEBUG_BLKIO, "UpdateMMCHSClkFrequency()\n"));
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// Set Clock enable to 0x0 to not provide the clock to the card
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MmioAnd32 (MMCHS_SYSCTL, ~CEN);
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// Set new clock frequency.
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MmioAndThenOr32 (MMCHS_SYSCTL, ~CLKD_MASK, NewCLKD << 6);
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// Poll till Internal Clock Stable
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while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
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// Set Clock enable to 0x1 to provide the clock to the card
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MmioOr32 (MMCHS_SYSCTL, CEN);
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}
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EFI_STATUS
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InitializeMMCHS (
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VOID
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)
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{
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UINT8 Data;
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EFI_STATUS Status;
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DEBUG ((DEBUG_BLKIO, "InitializeMMCHS()\n"));
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// Select Device group to belong to P1 device group in Power IC.
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Data = DEV_GRP_P1;
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Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEV_GRP), 1, &Data);
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ASSERT_EFI_ERROR(Status);
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// Configure voltage regulator for MMC1 in Power IC to output 3.0 voltage.
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Data = VSEL_3_00V;
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Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEDICATED_REG), 1, &Data);
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ASSERT_EFI_ERROR(Status);
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// After ramping up voltage, set VDDS stable bit to indicate that voltage level is stable.
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MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));
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// Enable WP GPIO
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MmioAndThenOr32 (GPIO1_BASE + GPIO_OE, ~BIT23, BIT23);
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// Enable Card Detect
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Data = CARD_DETECT_ENABLE;
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gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, TPS65950_GPIO_CTRL), 1, &Data);
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return Status;
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}
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BOOLEAN
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MMCIsCardPresent (
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IN EFI_MMC_HOST_PROTOCOL *This
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)
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{
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EFI_STATUS Status;
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UINT8 Data;
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//
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// Card detect is a GPIO0 on the TPS65950
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//
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Status = gTPS65950->Read (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, GPIODATAIN1), 1, &Data);
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if (EFI_ERROR (Status)) {
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return FALSE;
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}
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return !(Data & CARD_DETECT_BIT);
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}
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BOOLEAN
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MMCIsReadOnly (
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IN EFI_MMC_HOST_PROTOCOL *This
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)
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{
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/* Note:
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* On our BeagleBoard the SD card WP pin is always read as TRUE.
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* Probably something wrong with GPIO configuration.
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* BeagleBoard-xM uses microSD cards so there is no write protect at all.
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* Hence commenting out SD card WP pin read status.
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*/
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//return (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;
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return 0;
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}
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// TODO
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EFI_GUID mPL180MciDevicePathGuid = EFI_CALLER_ID_GUID;
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EFI_STATUS
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MMCBuildDevicePath (
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IN EFI_MMC_HOST_PROTOCOL *This,
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IN EFI_DEVICE_PATH_PROTOCOL **DevicePath
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)
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{
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EFI_DEVICE_PATH_PROTOCOL *NewDevicePathNode;
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NewDevicePathNode = CreateDeviceNode(HARDWARE_DEVICE_PATH,HW_VENDOR_DP,sizeof(VENDOR_DEVICE_PATH));
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CopyGuid(&((VENDOR_DEVICE_PATH*)NewDevicePathNode)->Guid,&mPL180MciDevicePathGuid);
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*DevicePath = NewDevicePathNode;
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return EFI_SUCCESS;
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}
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EFI_STATUS
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MMCSendCommand (
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IN EFI_MMC_HOST_PROTOCOL *This,
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IN MMC_CMD MmcCmd,
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IN UINT32 Argument
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)
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{
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UINTN MmcStatus;
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UINTN RetryCount = 0;
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if (IgnoreCommand(MmcCmd))
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return EFI_SUCCESS;
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MmcCmd = TranslateCommand(MmcCmd);
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//DEBUG ((EFI_D_ERROR, "MMCSendCommand(%d)\n", MmcCmd));
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// Check if command line is in use or not. Poll till command line is available.
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while ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) == DATI_NOT_ALLOWED);
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// Provide the block size.
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MmioWrite32 (MMCHS_BLK, BLEN_512BYTES);
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// Setting Data timeout counter value to max value.
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MmioAndThenOr32 (MMCHS_SYSCTL, ~DTO_MASK, DTO_VAL);
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// Clear Status register.
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MmioWrite32 (MMCHS_STAT, 0xFFFFFFFF);
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// Set command argument register
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MmioWrite32 (MMCHS_ARG, Argument);
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//TODO: fix this
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//Enable interrupt enable events to occur
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//MmioWrite32 (MMCHS_IE, CmdInterruptEnableVal);
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// Send a command
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MmioWrite32 (MMCHS_CMD, MmcCmd);
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// Check for the command status.
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while (RetryCount < MAX_RETRY_COUNT) {
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do {
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MmcStatus = MmioRead32 (MMCHS_STAT);
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} while (MmcStatus == 0);
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// Read status of command response
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if ((MmcStatus & ERRI) != 0) {
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// Perform soft-reset for mmci_cmd line.
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MmioOr32 (MMCHS_SYSCTL, SRC);
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while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
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//DEBUG ((EFI_D_INFO, "MmcStatus: 0x%x\n", MmcStatus));
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return EFI_DEVICE_ERROR;
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}
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// Check if command is completed.
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if ((MmcStatus & CC) == CC) {
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MmioWrite32 (MMCHS_STAT, CC);
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break;
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}
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RetryCount++;
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}
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if (RetryCount == MAX_RETRY_COUNT) {
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DEBUG ((DEBUG_BLKIO, "MMCSendCommand: Timeout\n"));
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return EFI_TIMEOUT;
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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MMCNotifyState (
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IN EFI_MMC_HOST_PROTOCOL *This,
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IN MMC_STATE State
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)
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{
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EFI_STATUS Status;
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UINTN FreqSel;
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switch(State) {
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case MmcInvalidState:
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ASSERT(0);
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break;
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case MmcHwInitializationState:
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mBitModeSet = FALSE;
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DEBUG ((DEBUG_BLKIO, "MMCHwInitializationState()\n"));
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Status = InitializeMMCHS ();
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if (EFI_ERROR(Status)) {
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DEBUG ((DEBUG_BLKIO, "Initialize MMC host controller fails. Status: %x\n", Status));
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return Status;
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}
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// Software reset of the MMCHS host controller.
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MmioWrite32 (MMCHS_SYSCONFIG, SOFTRESET);
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gBS->Stall(1000);
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while ((MmioRead32 (MMCHS_SYSSTATUS) & RESETDONE_MASK) != RESETDONE);
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// Soft reset for all.
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MmioWrite32 (MMCHS_SYSCTL, SRA);
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gBS->Stall(1000);
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while ((MmioRead32 (MMCHS_SYSCTL) & SRA) != 0x0);
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//Voltage capabilities initialization. Activate VS18 and VS30.
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MmioOr32 (MMCHS_CAPA, (VS30 | VS18));
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// Wakeup configuration
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MmioOr32 (MMCHS_SYSCONFIG, ENAWAKEUP);
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MmioOr32 (MMCHS_HCTL, IWE);
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// MMCHS Controller default initialization
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MmioOr32 (MMCHS_CON, (OD | DW8_1_4_BIT | CEATA_OFF));
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MmioWrite32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_OFF));
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// Enable internal clock
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MmioOr32 (MMCHS_SYSCTL, ICE);
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// Set the clock frequency to 80KHz.
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UpdateMMCHSClkFrequency (CLKD_80KHZ);
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// Enable SD bus power.
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MmioOr32 (MMCHS_HCTL, (SDBP_ON));
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// Poll till SD bus power bit is set.
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while ((MmioRead32 (MMCHS_HCTL) & SDBP_MASK) != SDBP_ON);
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// Enable interrupts.
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MmioWrite32 (MMCHS_IE, (BADA_EN | CERR_EN | DEB_EN | DCRC_EN | DTO_EN | CIE_EN |
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CEB_EN | CCRC_EN | CTO_EN | BRR_EN | BWR_EN | TC_EN | CC_EN));
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// Controller INIT procedure start.
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MmioOr32 (MMCHS_CON, INIT);
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MmioWrite32 (MMCHS_CMD, 0x00000000);
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while (!(MmioRead32 (MMCHS_STAT) & CC));
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// Wait for 1 ms
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gBS->Stall (1000);
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// Set CC bit to 0x1 to clear the flag
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MmioOr32 (MMCHS_STAT, CC);
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// Retry INIT procedure.
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MmioWrite32 (MMCHS_CMD, 0x00000000);
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while (!(MmioRead32 (MMCHS_STAT) & CC));
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// End initialization sequence
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MmioAnd32 (MMCHS_CON, ~INIT);
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MmioOr32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_ON));
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// Change clock frequency to 400KHz to fit protocol
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UpdateMMCHSClkFrequency(CLKD_400KHZ);
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MmioOr32 (MMCHS_CON, OD);
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break;
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case MmcIdleState:
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break;
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case MmcReadyState:
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break;
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case MmcIdentificationState:
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break;
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case MmcStandByState:
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CalculateCardCLKD (&FreqSel);
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UpdateMMCHSClkFrequency (FreqSel);
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break;
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case MmcTransferState:
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if (!mBitModeSet) {
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Status = MMCSendCommand (This, CMD55, mRca << 16);
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if (!EFI_ERROR (Status)) {
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// Set device into 4-bit data bus mode
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Status = MMCSendCommand (This, ACMD6, 0x2);
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if (!EFI_ERROR (Status)) {
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// Set host controler into 4-bit mode
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MmioOr32 (MMCHS_HCTL, DTW_4_BIT);
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DEBUG ((DEBUG_BLKIO, "SD Memory Card set to 4-bit mode\n"));
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mBitModeSet = TRUE;
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}
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}
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}
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break;
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case MmcSendingDataState:
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break;
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case MmcReceiveDataState:
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break;
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case MmcProgrammingState:
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break;
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case MmcDisconnectState:
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default:
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ASSERT(0);
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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MMCReceiveResponse (
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IN EFI_MMC_HOST_PROTOCOL *This,
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IN MMC_RESPONSE_TYPE Type,
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IN UINT32* Buffer
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)
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{
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if (Buffer == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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if (Type == MMC_RESPONSE_TYPE_R2) {
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Buffer[0] = MmioRead32 (MMCHS_RSP10);
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Buffer[1] = MmioRead32 (MMCHS_RSP32);
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Buffer[2] = MmioRead32 (MMCHS_RSP54);
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Buffer[3] = MmioRead32 (MMCHS_RSP76);
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} else {
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Buffer[0] = MmioRead32 (MMCHS_RSP10);
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}
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if (Type == MMC_RESPONSE_TYPE_CSD) {
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mMaxDataTransferRate = Buffer[3] & 0xFF;
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} else if (Type == MMC_RESPONSE_TYPE_RCA) {
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mRca = Buffer[0] >> 16;
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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MMCReadBlockData (
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IN EFI_MMC_HOST_PROTOCOL *This,
|
|
IN EFI_LBA Lba,
|
|
IN UINTN Length,
|
|
IN UINT32* Buffer
|
|
)
|
|
{
|
|
UINTN MmcStatus;
|
|
UINTN Count;
|
|
UINTN RetryCount = 0;
|
|
|
|
DEBUG ((DEBUG_BLKIO, "MMCReadBlockData(LBA: 0x%x, Length: 0x%x, Buffer: 0x%x)\n", Lba, Length, Buffer));
|
|
|
|
// Check controller status to make sure there is no error.
|
|
while (RetryCount < MAX_RETRY_COUNT) {
|
|
do {
|
|
// Read Status.
|
|
MmcStatus = MmioRead32 (MMCHS_STAT);
|
|
} while(MmcStatus == 0);
|
|
|
|
// Check if Buffer read ready (BRR) bit is set?
|
|
if (MmcStatus & BRR) {
|
|
|
|
// Clear BRR bit
|
|
MmioOr32 (MMCHS_STAT, BRR);
|
|
|
|
for (Count = 0; Count < Length / 4; Count++) {
|
|
*Buffer++ = MmioRead32(MMCHS_DATA);
|
|
}
|
|
break;
|
|
}
|
|
RetryCount++;
|
|
}
|
|
|
|
if (RetryCount == MAX_RETRY_COUNT) {
|
|
return EFI_TIMEOUT;
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
EFI_STATUS
|
|
MMCWriteBlockData (
|
|
IN EFI_MMC_HOST_PROTOCOL *This,
|
|
IN EFI_LBA Lba,
|
|
IN UINTN Length,
|
|
IN UINT32* Buffer
|
|
)
|
|
{
|
|
UINTN MmcStatus;
|
|
UINTN Count;
|
|
UINTN RetryCount = 0;
|
|
|
|
// Check controller status to make sure there is no error.
|
|
while (RetryCount < MAX_RETRY_COUNT) {
|
|
do {
|
|
// Read Status.
|
|
MmcStatus = MmioRead32 (MMCHS_STAT);
|
|
} while(MmcStatus == 0);
|
|
|
|
// Check if Buffer write ready (BWR) bit is set?
|
|
if (MmcStatus & BWR) {
|
|
|
|
// Clear BWR bit
|
|
MmioOr32 (MMCHS_STAT, BWR);
|
|
|
|
// Write block worth of data.
|
|
for (Count = 0; Count < Length / 4; Count++) {
|
|
MmioWrite32 (MMCHS_DATA, *Buffer++);
|
|
}
|
|
|
|
break;
|
|
}
|
|
RetryCount++;
|
|
}
|
|
|
|
if (RetryCount == MAX_RETRY_COUNT) {
|
|
return EFI_TIMEOUT;
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
EFI_MMC_HOST_PROTOCOL gMMCHost = {
|
|
MMC_HOST_PROTOCOL_REVISION,
|
|
MMCIsCardPresent,
|
|
MMCIsReadOnly,
|
|
MMCBuildDevicePath,
|
|
MMCNotifyState,
|
|
MMCSendCommand,
|
|
MMCReceiveResponse,
|
|
MMCReadBlockData,
|
|
MMCWriteBlockData
|
|
};
|
|
|
|
EFI_STATUS
|
|
MMCInitialize (
|
|
IN EFI_HANDLE ImageHandle,
|
|
IN EFI_SYSTEM_TABLE *SystemTable
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
EFI_HANDLE Handle = NULL;
|
|
|
|
DEBUG ((DEBUG_BLKIO, "MMCInitialize()\n"));
|
|
|
|
Status = gBS->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);
|
|
ASSERT_EFI_ERROR(Status);
|
|
|
|
Status = gBS->InstallMultipleProtocolInterfaces (
|
|
&Handle,
|
|
&gEfiMmcHostProtocolGuid, &gMMCHost,
|
|
NULL
|
|
);
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
return Status;
|
|
}
|