mirror of https://github.com/acidanthera/audk.git
421 lines
12 KiB
C
Executable File
421 lines
12 KiB
C
Executable File
/** @file
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Fixes Intel Itanium(TM) specific relocation types.
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Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "BasePeCoffLibInternals.h"
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#define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \
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Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
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#define INS_IMM64(Value, Address, Size, InstPos, ValPos) \
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*(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
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((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
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#define IMM64_IMM7B_INST_WORD_X 3
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#define IMM64_IMM7B_SIZE_X 7
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#define IMM64_IMM7B_INST_WORD_POS_X 4
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#define IMM64_IMM7B_VAL_POS_X 0
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#define IMM64_IMM9D_INST_WORD_X 3
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#define IMM64_IMM9D_SIZE_X 9
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#define IMM64_IMM9D_INST_WORD_POS_X 18
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#define IMM64_IMM9D_VAL_POS_X 7
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#define IMM64_IMM5C_INST_WORD_X 3
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#define IMM64_IMM5C_SIZE_X 5
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#define IMM64_IMM5C_INST_WORD_POS_X 13
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#define IMM64_IMM5C_VAL_POS_X 16
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#define IMM64_IC_INST_WORD_X 3
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#define IMM64_IC_SIZE_X 1
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#define IMM64_IC_INST_WORD_POS_X 12
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#define IMM64_IC_VAL_POS_X 21
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#define IMM64_IMM41A_INST_WORD_X 1
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#define IMM64_IMM41A_SIZE_X 10
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#define IMM64_IMM41A_INST_WORD_POS_X 14
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#define IMM64_IMM41A_VAL_POS_X 22
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#define IMM64_IMM41B_INST_WORD_X 1
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#define IMM64_IMM41B_SIZE_X 8
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#define IMM64_IMM41B_INST_WORD_POS_X 24
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#define IMM64_IMM41B_VAL_POS_X 32
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#define IMM64_IMM41C_INST_WORD_X 2
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#define IMM64_IMM41C_SIZE_X 23
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#define IMM64_IMM41C_INST_WORD_POS_X 0
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#define IMM64_IMM41C_VAL_POS_X 40
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#define IMM64_SIGN_INST_WORD_X 3
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#define IMM64_SIGN_SIZE_X 1
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#define IMM64_SIGN_INST_WORD_POS_X 27
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#define IMM64_SIGN_VAL_POS_X 63
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/**
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Performs an Itanium-based specific relocation fixup.
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@param Reloc The pointer to the relocation record.
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@param Fixup The pointer to the address to fix up.
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@param FixupData The pointer to a buffer to log the fixups.
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@param Adjust The offset to adjust the fixup.
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@retval RETURN_SUCCESS Succeed to fix the relocation entry.
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@retval RETURN_UNSUPPOTED Unrecoganized relocation entry.
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**/
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RETURN_STATUS
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PeCoffLoaderRelocateImageEx (
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IN UINT16 **Reloc,
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IN OUT CHAR8 *Fixup,
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IN OUT CHAR8 **FixupData,
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IN UINT64 Adjust
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)
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{
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UINT64 *Fixup64;
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UINT64 FixupVal;
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switch ((**Reloc) >> 12) {
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case EFI_IMAGE_REL_BASED_IA64_IMM64:
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//
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// Align it to bundle address before fixing up the
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// 64-bit immediate value of the movl instruction.
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//
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Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));
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FixupVal = (UINT64)0;
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//
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// Extract the lower 32 bits of IMM64 from bundle
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//
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EXT_IMM64(FixupVal,
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(UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,
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IMM64_IMM7B_SIZE_X,
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IMM64_IMM7B_INST_WORD_POS_X,
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IMM64_IMM7B_VAL_POS_X
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);
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EXT_IMM64(FixupVal,
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(UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,
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IMM64_IMM9D_SIZE_X,
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IMM64_IMM9D_INST_WORD_POS_X,
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IMM64_IMM9D_VAL_POS_X
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);
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EXT_IMM64(FixupVal,
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(UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,
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IMM64_IMM5C_SIZE_X,
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IMM64_IMM5C_INST_WORD_POS_X,
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IMM64_IMM5C_VAL_POS_X
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);
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EXT_IMM64(FixupVal,
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(UINT32 *)Fixup + IMM64_IC_INST_WORD_X,
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IMM64_IC_SIZE_X,
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IMM64_IC_INST_WORD_POS_X,
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IMM64_IC_VAL_POS_X
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);
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EXT_IMM64(FixupVal,
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(UINT32 *)Fixup + IMM64_IMM41A_INST_WORD_X,
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IMM64_IMM41A_SIZE_X,
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IMM64_IMM41A_INST_WORD_POS_X,
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IMM64_IMM41A_VAL_POS_X
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);
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//
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// Update 64-bit address
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//
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FixupVal += Adjust;
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//
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// Insert IMM64 into bundle
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//
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INS_IMM64(FixupVal,
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((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),
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IMM64_IMM7B_SIZE_X,
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IMM64_IMM7B_INST_WORD_POS_X,
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IMM64_IMM7B_VAL_POS_X
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);
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INS_IMM64(FixupVal,
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((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),
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IMM64_IMM9D_SIZE_X,
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IMM64_IMM9D_INST_WORD_POS_X,
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IMM64_IMM9D_VAL_POS_X
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);
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INS_IMM64(FixupVal,
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((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),
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IMM64_IMM5C_SIZE_X,
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IMM64_IMM5C_INST_WORD_POS_X,
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IMM64_IMM5C_VAL_POS_X
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);
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INS_IMM64(FixupVal,
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((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),
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IMM64_IC_SIZE_X,
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IMM64_IC_INST_WORD_POS_X,
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IMM64_IC_VAL_POS_X
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);
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INS_IMM64(FixupVal,
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((UINT32 *)Fixup + IMM64_IMM41A_INST_WORD_X),
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IMM64_IMM41A_SIZE_X,
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IMM64_IMM41A_INST_WORD_POS_X,
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IMM64_IMM41A_VAL_POS_X
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);
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INS_IMM64(FixupVal,
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((UINT32 *)Fixup + IMM64_IMM41B_INST_WORD_X),
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IMM64_IMM41B_SIZE_X,
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IMM64_IMM41B_INST_WORD_POS_X,
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IMM64_IMM41B_VAL_POS_X
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);
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INS_IMM64(FixupVal,
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((UINT32 *)Fixup + IMM64_IMM41C_INST_WORD_X),
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IMM64_IMM41C_SIZE_X,
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IMM64_IMM41C_INST_WORD_POS_X,
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IMM64_IMM41C_VAL_POS_X
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);
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INS_IMM64(FixupVal,
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((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),
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IMM64_SIGN_SIZE_X,
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IMM64_SIGN_INST_WORD_POS_X,
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IMM64_SIGN_VAL_POS_X
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);
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Fixup64 = (UINT64 *) Fixup;
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if (*FixupData != NULL) {
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*FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
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*(UINT64 *)(*FixupData) = *Fixup64;
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*FixupData = *FixupData + sizeof(UINT64);
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}
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break;
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default:
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return RETURN_UNSUPPORTED;
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}
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return RETURN_SUCCESS;
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}
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/**
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Returns TRUE if the machine type of PE/COFF image is supported. Supported
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does not mean the image can be executed it means the PE/COFF loader supports
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loading and relocating of the image type. It's up to the caller to support
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the entry point.
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The itanium version PE/COFF loader/relocater supports itanium and EBC image.
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@param Machine Machine type from the PE Header.
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@return TRUE if this PE/COFF loader can load the image
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@return FALSE unrecoganized machine type of image.
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**/
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BOOLEAN
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PeCoffLoaderImageFormatSupported (
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IN UINT16 Machine
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)
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{
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if ((Machine == IMAGE_FILE_MACHINE_IA64) || (Machine == IMAGE_FILE_MACHINE_EBC)) {
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return TRUE;
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}
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return FALSE;
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}
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/**
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Performs an Itanium-based specific relocation fixup and is a no-op on other
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instruction sets.
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@param Reloc Pointer to Pointer to the relocation record.
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@param Fixup Pointer to the address to fix up.
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@param FixupData Pointer to a buffer to log the fixups.
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@param Adjust The offset to adjust the fixup.
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@return Status code.
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**/
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RETURN_STATUS
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PeHotRelocateImageEx (
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IN UINT16 **Reloc,
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IN OUT CHAR8 *Fixup,
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IN OUT CHAR8 **FixupData,
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IN UINT64 Adjust
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)
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{
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UINT64 *Fixup64;
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UINT64 FixupVal;
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switch ((**Reloc) >> 12) {
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case EFI_IMAGE_REL_BASED_DIR64:
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Fixup64 = (UINT64 *) Fixup;
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*FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT64));
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if (*(UINT64 *) (*FixupData) == *Fixup64) {
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*Fixup64 = *Fixup64 + (UINT64) Adjust;
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}
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*FixupData = *FixupData + sizeof (UINT64);
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break;
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case EFI_IMAGE_REL_BASED_IA64_IMM64:
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Fixup64 = (UINT64 *) Fixup;
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*FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT64));
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if (*(UINT64 *) (*FixupData) == *Fixup64) {
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//
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// Align it to bundle address before fixing up the
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// 64-bit immediate value of the movl instruction.
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//
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//
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Fixup = (CHAR8 *) ((UINT64) Fixup & (UINT64)~(15));
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FixupVal = (UINT64) 0;
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//
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// Extract the lower 32 bits of IMM64 from bundle
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//
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EXT_IMM64 (
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FixupVal,
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(UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X,
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IMM64_IMM7B_SIZE_X,
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IMM64_IMM7B_INST_WORD_POS_X,
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IMM64_IMM7B_VAL_POS_X
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);
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EXT_IMM64 (
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FixupVal,
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(UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X,
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IMM64_IMM9D_SIZE_X,
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IMM64_IMM9D_INST_WORD_POS_X,
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IMM64_IMM9D_VAL_POS_X
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);
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EXT_IMM64 (
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FixupVal,
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(UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X,
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IMM64_IMM5C_SIZE_X,
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IMM64_IMM5C_INST_WORD_POS_X,
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IMM64_IMM5C_VAL_POS_X
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);
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EXT_IMM64 (
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FixupVal,
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(UINT32 *) Fixup + IMM64_IC_INST_WORD_X,
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IMM64_IC_SIZE_X,
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IMM64_IC_INST_WORD_POS_X,
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IMM64_IC_VAL_POS_X
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);
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EXT_IMM64 (
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FixupVal,
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(UINT32 *) Fixup + IMM64_IMM41A_INST_WORD_X,
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IMM64_IMM41A_SIZE_X,
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IMM64_IMM41A_INST_WORD_POS_X,
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IMM64_IMM41A_VAL_POS_X
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);
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//
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// Update 64-bit address
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//
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FixupVal += Adjust;
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//
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// Insert IMM64 into bundle
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//
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INS_IMM64 (
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FixupVal,
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((UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X),
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IMM64_IMM7B_SIZE_X,
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IMM64_IMM7B_INST_WORD_POS_X,
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IMM64_IMM7B_VAL_POS_X
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);
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INS_IMM64 (
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FixupVal,
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((UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X),
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IMM64_IMM9D_SIZE_X,
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IMM64_IMM9D_INST_WORD_POS_X,
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IMM64_IMM9D_VAL_POS_X
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);
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INS_IMM64 (
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FixupVal,
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((UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X),
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IMM64_IMM5C_SIZE_X,
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IMM64_IMM5C_INST_WORD_POS_X,
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IMM64_IMM5C_VAL_POS_X
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);
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INS_IMM64 (
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FixupVal,
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((UINT32 *) Fixup + IMM64_IC_INST_WORD_X),
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IMM64_IC_SIZE_X,
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IMM64_IC_INST_WORD_POS_X,
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IMM64_IC_VAL_POS_X
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);
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INS_IMM64 (
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FixupVal,
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((UINT32 *) Fixup + IMM64_IMM41A_INST_WORD_X),
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IMM64_IMM41A_SIZE_X,
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IMM64_IMM41A_INST_WORD_POS_X,
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IMM64_IMM41A_VAL_POS_X
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);
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INS_IMM64 (
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FixupVal,
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((UINT32 *) Fixup + IMM64_IMM41B_INST_WORD_X),
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IMM64_IMM41B_SIZE_X,
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IMM64_IMM41B_INST_WORD_POS_X,
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IMM64_IMM41B_VAL_POS_X
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);
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INS_IMM64 (
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FixupVal,
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((UINT32 *) Fixup + IMM64_IMM41C_INST_WORD_X),
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IMM64_IMM41C_SIZE_X,
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IMM64_IMM41C_INST_WORD_POS_X,
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IMM64_IMM41C_VAL_POS_X
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);
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INS_IMM64 (
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FixupVal,
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((UINT32 *) Fixup + IMM64_SIGN_INST_WORD_X),
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IMM64_SIGN_SIZE_X,
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IMM64_SIGN_INST_WORD_POS_X,
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IMM64_SIGN_VAL_POS_X
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);
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*(UINT64 *) (*FixupData) = *Fixup64;
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}
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*FixupData = *FixupData + sizeof (UINT64);
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break;
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default:
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DEBUG ((EFI_D_ERROR, "PeHotRelocateEx:unknown fixed type\n"));
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return RETURN_UNSUPPORTED;
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}
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return RETURN_SUCCESS;
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}
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