mirror of https://github.com/acidanthera/audk.git
140 lines
3.8 KiB
C
140 lines
3.8 KiB
C
/** @file
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*
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* Copyright (c) 2011, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include <Library/IoLib.h>
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#include <Library/ArmPlatformLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Drivers/PL341Dmc.h>
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#include <Drivers/SP804Timer.h>
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#include <Ppi/ArmMpCoreInfo.h>
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#include <ArmPlatform.h>
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ARM_CORE_INFO mRealViewEbMpCoreInfoTable[] = {
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{
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// Cluster 0, Core 0
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0x0, 0x0,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,
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(UINT64)0xFFFFFFFF
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},
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{
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// Cluster 0, Core 1
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0x0, 0x1,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,
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(UINT64)0xFFFFFFFF
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}
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};
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/**
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Return the current Boot Mode
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This function returns the boot reason on the platform
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**/
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EFI_BOOT_MODE
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ArmPlatformGetBootMode (
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VOID
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)
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{
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return BOOT_WITH_FULL_CONFIGURATION;
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}
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/**
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Initialize controllers that must setup in the normal world
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This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
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in the PEI phase.
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**/
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VOID
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ArmPlatformNormalInitialize (
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VOID
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)
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{
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// Disable memory remapping and return to normal mapping
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MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE
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// Configure periodic timer (TIMER0) for 1MHz operation
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MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
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// Configure 1MHz clock
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MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
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// configure SP810 to use 1MHz clock and disable
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MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
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// Configure SP810 to use 1MHz clock and disable
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MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
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}
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/**
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Initialize the system (or sometimes called permanent) memory
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This memory is generally represented by the DRAM.
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**/
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VOID
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ArmPlatformInitializeSystemMemory (
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VOID
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)
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{
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// We do not need to initialize the System Memory on RTSM
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}
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EFI_STATUS
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PrePeiCoreGetMpCoreInfo (
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OUT UINTN *CoreCount,
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OUT ARM_CORE_INFO **ArmCoreTable
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)
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{
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if ((MmioRead32 (ARM_EB_SYS_PROCID0_REG) & ARM_EB_SYS_PROC_ID_MASK) == ARM_EB_SYS_PROC_ID_CORTEX_A9) {
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*CoreCount = sizeof(mRealViewEbMpCoreInfoTable) / sizeof(ARM_CORE_INFO);
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*ArmCoreTable = mRealViewEbMpCoreInfoTable;
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return EFI_SUCCESS;
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} else {
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return EFI_UNSUPPORTED;
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}
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}
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// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
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EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
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ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
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EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
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{
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EFI_PEI_PPI_DESCRIPTOR_PPI,
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&mArmMpCoreInfoPpiGuid,
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&mMpCoreInfoPpi
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}
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};
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VOID
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ArmPlatformGetPlatformPpiList (
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OUT UINTN *PpiListSize,
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OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
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)
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{
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*PpiListSize = sizeof(gPlatformPpiTable);
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*PpiList = gPlatformPpiTable;
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}
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