mirror of https://github.com/acidanthera/audk.git
fafb7e9c11
As EDK2 runs in an idmap, we do not use TTBR1_EL1, nor do we configure it. TTBR1_EL1 may contain UNKNOWN values if it is not programmed since reset. Prior to enabling the MMU, we do not set TCR_EL1.EPD1, and hence the CPU may make page table walks via TTBR1_EL1 at any time, potentially using UNKNOWN values. This can result in a number of potential problems (e.g. the CPU may load from MMIO registers as part of a page table walk). Additionally, in the presence of Cortex-A57 erratum #822227, we must program TCR_EL1.TG1 == 0b1x (e.g. 4KB granule) regardless of the value of TCR_EL1.EPD1, to ensure that EDK2 can make forward progress under a hypervisor which makes use of PAR_EL1. This patch ensures that we program TCR_EL1.EPD1 and TCR_EL1.TG1 as above to avoid these issues. TCR_EL1.TG1 is set to 4K for all targets, as any CPU capable of running EDK2 must support this granule, and given TCR_EL1.EPD1, programming the field is not detrimental in the absence of the erratum. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18903 6f19259b-4bc3-4df7-8a09-765794883524 |
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| .. | ||
| ArmArchTimerLib | ||
| ArmCacheMaintenanceLib | ||
| ArmDisassemblerLib | ||
| ArmDmaLib | ||
| ArmGenericTimerPhyCounterLib | ||
| ArmGenericTimerVirtCounterLib | ||
| ArmGicArchLib | ||
| ArmGicArchSecLib | ||
| ArmHvcLib | ||
| ArmLib | ||
| ArmPsciResetSystemLib | ||
| ArmSmcLib | ||
| ArmSmcLibNull | ||
| BaseMemoryLibStm | ||
| BaseMemoryLibVstm | ||
| BdsLib | ||
| CompilerIntrinsicsLib | ||
| DebugAgentSymbolsBaseLib | ||
| DebugPeCoffExtraActionLib | ||
| DebugUncachedMemoryAllocationLib | ||
| DefaultExceptionHandlerLib | ||
| PeiServicesTablePointerLib | ||
| RvdPeCoffExtraActionLib | ||
| SemiHostingDebugLib | ||
| SemiHostingSerialPortLib | ||
| SemihostLib | ||
| UncachedMemoryAllocationLib | ||