Zhiguang Liu 392456240a BaseTools: Remove logic to create AP waking vector in GenFv ... REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4494 Today for SEC core(not VTF-0), GenFv finds free 4K aligned space in FV for AP waking vector and JMP to 4G-30h in the waking vector. There is no usage of this today. Remove the logic to avoid confusing and save spaces in reset vector. Cc: Rebecca Cran <rebecca@bsdio.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Yuwei Chen <yuwei.chen@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>		2023-09-18 02:39:25 +00:00
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C	BaseTools: Remove logic to create AP waking vector in GenFv	2023-09-18 02:39:25 +00:00
Python	BaseTools: Allow users to specify compiler to use with make CC= CXX=	2023-04-05 15:44:48 +00:00