audk/MdeModulePkg/Bus
Wenyi Xie b5379899b3 MdeModulePkg/Xhci: Fix TRT when data length is 0
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3418

According to xhci spec, at USB packet level, a Control Transfer
consists of multiple transactions partitioned into stages: a
setup stage, an optional data stage, and a terminating status
stage. If Data Stage does not exist, the Transfer Type flag(TRT)
should be No Data Stage.
So if data length equals to 0, TRT is set to 0.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-06-02 07:55:57 +00:00
..
Ata MdeModulePkg: Initialize local variable value before they are used 2021-03-25 01:54:46 +00:00
I2c/I2cDxe MdeModulePkg/Bus/I2c: Fix few typos 2020-02-10 22:30:07 +00:00
Isa MdeModulePkg/Bus/Isa: Fix various typos 2020-02-10 22:30:07 +00:00
Pci MdeModulePkg/Xhci: Fix TRT when data length is 0 2021-06-02 07:55:57 +00:00
Scsi MdeModulePkg/Bus/Scsi: Fix various typos 2020-02-10 22:30:07 +00:00
Sd MdeModulePkg/SdDxe: Check the Token to avoid null pointer 2020-03-27 01:04:25 +00:00
Ufs MdeModulePkg/UfsPassThruDxe: Improve Device initialization polling Loop 2021-03-05 08:43:23 +00:00
Usb MdeModulePkg/Usb: Fix various typos 2020-02-10 22:30:07 +00:00