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Fix comments (Gerd Grosse, https://sourceforge.net/p/freedos/bugs/106/)

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This commit is contained in:
Bart Oldeman 2018-09-06 10:07:00 -04:00
parent 5ff361314c
commit fa36d8aa25
1 changed files with 12 additions and 12 deletions
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24
kernel/ludivmul.inc
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@ -61,15 +61,15 @@
pop bp pop bp
%endif %endif
test cx, cx ; divisor > 2^32-1 ? test cx, cx ; divisor > 2^16-1 ?
jnz %%big_divisor ; yes, divisor > 32^32-1 jnz %%big_divisor ; yes, divisor > 2^16-1
cmp dx, bx ; only one division needed ? (ecx = 0) cmp dx, bx ; only one division needed ? (cx = 0)
jb %%one_div ; yes, one division sufficient jb %%one_div ; yes, one division sufficient
xchg cx, ax ; save dividend-lo in cx, ax=0 xchg cx, ax ; save dividend-lo in cx, ax=0
xchg ax, dx ; get dividend-hi in ax, dx=0 xchg ax, dx ; get dividend-hi in ax, dx=0
div bx ; quotient-hi in eax div bx ; quotient-hi in ax
xchg ax, cx ; cx = quotient-hi, ax =dividend-lo xchg ax, cx ; cx = quotient-hi, ax =dividend-lo
%%one_div: %%one_div:
@ -88,12 +88,12 @@
mov di, cx ; di:bx and cx:si mov di, cx ; di:bx and cx:si
%%shift_loop: %%shift_loop:
shr dx, 1 ; shift both shr dx, 1 ; shift both
rcr ax, 1 ; divisor and rcr ax, 1 ; dividend
shr di, 1 ; and dividend shr di, 1 ; and divisor
rcr bx, 1 ; right by 1 bit rcr bx, 1 ; right by 1 bit
jnz %%shift_loop ; loop if di non-zero (rcr does not touch ZF) jnz %%shift_loop ; loop if di non-zero (rcr does not touch ZF)
mov di, cx ; restore original divisor (di:si) mov di, cx ; restore original divisor (di:si)
div bx ; compute quotient div bx ; compute quotient dx:ax>>x / cx:bx>>x (stored in ax; remainder in dx not used)
pop bx ; get dividend lo-word pop bx ; get dividend lo-word
mov cx, ax ; save quotient mov cx, ax ; save quotient
mul di ; quotient * divisor hi-word (low only) mul di ; quotient * divisor hi-word (low only)
@ -109,11 +109,11 @@
sbb cx, dx ; subtract divisor * quot. from dividend sbb cx, dx ; subtract divisor * quot. from dividend
sbb dx, dx ; 0 if remainder > 0, else FFFFFFFFh sbb dx, dx ; 0 if remainder > 0, else FFFFFFFFh
and si, dx ; nothing to add and si, dx ; nothing to add
and di, dx ; back if remainder positive and di, dx ; back if remainder positive di:si := di:si(cx:bx) & dx:dx
add bx, si ; correct remaider add bx, si ; correct remainder cx:bx += di:si
adc cx, di ; and quotient if adc cx, di ; and
add ax, dx ; necessary add ax, dx ; quotient if necessary ax += dx
xor dx, dx ; clear hi-word of quot (ax<=FFFFFFFFh) xor dx, dx ; clear hi-word of quot (ax<=FFFFh) dx := 0
pop di ; restore temp pop di ; restore temp
pop si ; variables pop si ; variables
ret ret