Add VHDL unresolved numeric_std types highlighting

Close #10632
This commit is contained in:
Andrey Smolyakov 2021-10-07 20:36:46 +03:00 committed by Don Ho
parent 540fbeddda
commit 4c34652e14
1 changed files with 1 additions and 1 deletions

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@ -387,7 +387,7 @@
<Keywords name="type1">left right low high ascending image value pos val succ pred leftof rightof base range reverse_range length delayed stable quiet transaction event active last_event last_active last_value driving driving_value simple_name path_name instance_name minimum maximum</Keywords>
<Keywords name="type2">now readline read writeline write endfile resolved to_bit to_bitvector to_stdulogic to_stdlogicvector to_stdulogicvector to_x01 to_x01z to_UX01 rising_edge falling_edge is_x shift_left shift_right rotate_left rotate_right resize to_integer to_unsigned to_signed to_string to_bstring to_binarystring to_ostring to_octalstring to_hstring to_hexstring std_match to_01</Keywords>
<Keywords name="type3">std ieee work standard textio std_logic_1164 std_logic_arith std_logic_misc std_logic_signed std_logic_textio std_logic_unsigned numeric_bit numeric_std math_complex math_real vital_primitives vital_timing</Keywords>
<Keywords name="type4">boolean boolean_vector bit character severity_level integer integer_vector real real_vector time time_vector delay_length natural positive string bit_vector file_open_kind file_open_status line text side width std_ulogic std_ulogic_vector std_logic std_logic_vector X01 X01Z UX01 UX01Z unsigned signed</Keywords>
<Keywords name="type4">boolean boolean_vector bit character severity_level integer integer_vector real real_vector time time_vector delay_length natural positive string bit_vector file_open_kind file_open_status line text side width std_ulogic std_ulogic_vector std_logic std_logic_vector X01 X01Z UX01 UX01Z unsigned signed unresolved_unsigned unresolved_signed u_unsigned u_signed</Keywords>
</Language>
<Language name="visualprolog" ext="pro cl i pack ph" commentLine="%" commentStart="/*" commentEnd="*/">
<Keywords name="instre1">goal namespace interface class implement open inherits supports resolve delegate monitor constants domains predicates constructors properties clauses facts</Keywords>