2016-05-13 07:00:53 +02:00
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/** @file
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2022-04-15 10:37:36 +02:00
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Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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2019-04-04 01:04:04 +02:00
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SPDX-License-Identifier: BSD-2-Clause-Patent
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2016-05-13 07:00:53 +02:00
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**/
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#include "SecMain.h"
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#include "SecFsp.h"
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EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = {
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SecTemporaryRamSupport
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};
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EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {
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2018-10-11 15:22:12 +02:00
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{
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EFI_PEI_PPI_DESCRIPTOR_PPI,
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&gFspInApiModePpiGuid,
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NULL
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},
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2016-05-13 07:00:53 +02:00
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{
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiTemporaryRamSupportPpiGuid,
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&gSecTemporaryRamSupportPpi
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}
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};
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//
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// These are IDT entries pointing to 08:FFFFFFE4h.
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//
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UINT64 mIdtEntryTemplate = 0xffff8e000008ffe4ULL;
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/**
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Entry point to the C language phase of SEC. After the SEC assembly
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code has initialized some temporary memory and set up the stack,
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the control is transferred to this function.
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@param[in] SizeOfRam Size of the temporary memory available for use.
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2016-10-19 09:01:19 +02:00
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@param[in] TempRamBase Base address of temporary ram
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2016-05-13 07:00:53 +02:00
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@param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.
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@param[in] PeiCore PeiCore entry point.
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@param[in] BootLoaderStack BootLoader stack.
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@param[in] ApiIdx the index of API.
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@return This function never returns.
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**/
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VOID
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EFIAPI
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SecStartup (
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IN UINT32 SizeOfRam,
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IN UINT32 TempRamBase,
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IN VOID *BootFirmwareVolume,
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IN PEI_CORE_ENTRY PeiCore,
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2022-04-15 10:37:36 +02:00
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IN UINTN BootLoaderStack,
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2016-05-13 07:00:53 +02:00
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IN UINT32 ApiIdx
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)
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{
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2022-07-12 11:30:58 +02:00
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EFI_SEC_PEI_HAND_OFF SecCoreData;
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IA32_DESCRIPTOR IdtDescriptor;
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SEC_IDT_TABLE IdtTableInStack;
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UINT32 Index;
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FSP_GLOBAL_DATA PeiFspData;
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IA32_IDT_GATE_DESCRIPTOR ExceptionHandler;
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UINTN IdtSize;
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2016-05-13 07:00:53 +02:00
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//
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// Process all libraries constructor function linked to SecCore.
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//
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ProcessLibraryConstructorList ();
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//
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// Initialize floating point operating environment
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// to be compliant with UEFI spec.
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//
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InitializeFloatingPointUnits ();
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2019-01-23 09:12:38 +01:00
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//
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// Scenario 1 memory map when running on bootloader stack
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//
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// |-------------------|---->
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// |Idt Table |
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// |-------------------|
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// |PeiService Pointer |
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// |-------------------|
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// | |
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// | |
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// | Heap |
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// | |
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// | |
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// |-------------------|----> TempRamBase
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//
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//
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// |-------------------|
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// |Bootloader stack |----> somewhere in memory, FSP will share this stack.
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// |-------------------|
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2016-05-13 07:00:53 +02:00
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2019-01-23 09:12:38 +01:00
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//
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// Scenario 2 memory map when running FSP on a separate stack
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//
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2016-05-13 07:00:53 +02:00
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// |-------------------|---->
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// |Idt Table |
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// |-------------------|
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// |PeiService Pointer | PeiStackSize
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// |-------------------|
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// | |
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// | Stack |
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// |-------------------|---->
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// | |
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// | |
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2019-07-11 10:54:31 +02:00
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// | Heap | PeiTemporaryRamSize
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2016-05-13 07:00:53 +02:00
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// | |
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// | |
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// |-------------------|----> TempRamBase
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2019-07-25 16:22:29 +02:00
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IdtTableInStack.PeiService = 0;
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2018-10-19 11:10:30 +02:00
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AsmReadIdtr (&IdtDescriptor);
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2018-10-26 09:12:33 +02:00
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if (IdtDescriptor.Base == 0) {
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2018-10-19 11:10:30 +02:00
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ExceptionHandler = FspGetExceptionHandler (mIdtEntryTemplate);
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for (Index = 0; Index < FixedPcdGet8 (PcdFspMaxInterruptSupported); Index++) {
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2022-07-12 11:30:58 +02:00
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CopyMem ((VOID *)&IdtTableInStack.IdtTable[Index], (VOID *)&ExceptionHandler, sizeof (IA32_IDT_GATE_DESCRIPTOR));
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2018-10-19 11:10:30 +02:00
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}
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2021-12-05 23:53:59 +01:00
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2018-10-19 11:10:30 +02:00
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IdtSize = sizeof (IdtTableInStack.IdtTable);
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} else {
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2018-10-26 04:41:49 +02:00
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IdtSize = IdtDescriptor.Limit + 1;
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if (IdtSize > sizeof (IdtTableInStack.IdtTable)) {
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2018-10-19 11:10:30 +02:00
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//
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// ERROR: IDT table size from boot loader is larger than FSP can support, DeadLoop here!
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//
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CpuDeadLoop ();
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2018-10-26 09:12:33 +02:00
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} else {
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CopyMem ((VOID *)(UINTN)&IdtTableInStack.IdtTable, (VOID *)IdtDescriptor.Base, IdtSize);
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2018-10-19 11:10:30 +02:00
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}
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2016-05-13 07:00:53 +02:00
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}
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2021-12-05 23:53:59 +01:00
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2016-05-13 07:00:53 +02:00
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IdtDescriptor.Base = (UINTN)&IdtTableInStack.IdtTable;
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2018-10-19 11:10:30 +02:00
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IdtDescriptor.Limit = (UINT16)(IdtSize - 1);
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2016-05-13 07:00:53 +02:00
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AsmWriteIdtr (&IdtDescriptor);
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//
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// Initialize the global FSP data region
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//
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FspGlobalDataInit (&PeiFspData, BootLoaderStack, (UINT8)ApiIdx);
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//
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// Update the base address and length of Pei temporary memory
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//
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SecCoreData.DataSize = sizeof (EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;
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SecCoreData.BootFirmwareVolumeSize = (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)BootFirmwareVolume)->FvLength;
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2021-01-05 09:55:25 +01:00
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//
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// Support FSP reserved temporary memory from the whole temporary memory provided by bootloader.
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// FSP reserved temporary memory will not be given to PeiCore.
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//
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SecCoreData.TemporaryRamBase = (UINT8 *)(UINTN)TempRamBase + PcdGet32 (PcdFspPrivateTemporaryRamSize);
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SecCoreData.TemporaryRamSize = SizeOfRam - PcdGet32 (PcdFspPrivateTemporaryRamSize);
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2019-01-23 09:12:38 +01:00
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if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {
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SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
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SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize;
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SecCoreData.StackBase = (VOID *)GetFspEntryStack (); // Share the same boot loader stack
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SecCoreData.StackSize = 0;
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} else {
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SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
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SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize * PcdGet8 (PcdFspHeapSizePercentage) / 100;
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SecCoreData.StackBase = (VOID *)(UINTN)((UINTN)SecCoreData.TemporaryRamBase + SecCoreData.PeiTemporaryRamSize);
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SecCoreData.StackSize = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;
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}
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2016-05-13 07:00:53 +02:00
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DEBUG ((DEBUG_INFO, "Fsp BootFirmwareVolumeBase - 0x%x\n", SecCoreData.BootFirmwareVolumeBase));
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DEBUG ((DEBUG_INFO, "Fsp BootFirmwareVolumeSize - 0x%x\n", SecCoreData.BootFirmwareVolumeSize));
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DEBUG ((DEBUG_INFO, "Fsp TemporaryRamBase - 0x%x\n", SecCoreData.TemporaryRamBase));
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DEBUG ((DEBUG_INFO, "Fsp TemporaryRamSize - 0x%x\n", SecCoreData.TemporaryRamSize));
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DEBUG ((DEBUG_INFO, "Fsp PeiTemporaryRamBase - 0x%x\n", SecCoreData.PeiTemporaryRamBase));
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DEBUG ((DEBUG_INFO, "Fsp PeiTemporaryRamSize - 0x%x\n", SecCoreData.PeiTemporaryRamSize));
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DEBUG ((DEBUG_INFO, "Fsp StackBase - 0x%x\n", SecCoreData.StackBase));
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DEBUG ((DEBUG_INFO, "Fsp StackSize - 0x%x\n", SecCoreData.StackSize));
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//
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// Call PeiCore Entry
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2018-06-27 15:07:04 +02:00
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//
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2016-05-13 07:00:53 +02:00
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PeiCore (&SecCoreData, mPeiSecPlatformInformationPpi);
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//
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// Should never be here
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//
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CpuDeadLoop ();
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}
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/**
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This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
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permanent memory.
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@param[in] PeiServices Pointer to the PEI Services Table.
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@param[in] TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
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Temporary RAM contents.
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@param[in] PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
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Temporary RAM contents.
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@param[in] CopySize Amount of memory to migrate from temporary to permanent memory.
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@retval EFI_SUCCESS The data was successfully returned.
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@retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
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TemporaryMemoryBase > PermanentMemoryBase.
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**/
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EFI_STATUS
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EFIAPI
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SecTemporaryRamSupport (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
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IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
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IN UINTN CopySize
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)
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{
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IA32_DESCRIPTOR IdtDescriptor;
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VOID *OldHeap;
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VOID *NewHeap;
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VOID *OldStack;
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VOID *NewStack;
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UINTN HeapSize;
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UINTN StackSize;
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2019-01-23 09:12:38 +01:00
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UINTN CurrentStack;
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UINTN FspStackBase;
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2020-04-30 03:28:35 +02:00
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//
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// Override OnSeparateStack to 1 because this function will switch stack to permanent memory
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// which makes FSP running on different stack from bootloader temporary ram stack.
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//
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GetFspGlobalDataPointer ()->OnSeparateStack = 1;
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2019-01-23 09:12:38 +01:00
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if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {
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2022-04-15 10:37:36 +02:00
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CurrentStack = AsmReadStackPointer ();
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2019-01-23 09:12:38 +01:00
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FspStackBase = (UINTN)GetFspEntryStack ();
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2018-06-27 15:07:04 +02:00
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2019-01-23 09:12:38 +01:00
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StackSize = FspStackBase - CurrentStack;
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HeapSize = CopySize;
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2016-05-13 07:00:53 +02:00
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2019-01-23 09:12:38 +01:00
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OldHeap = (VOID *)(UINTN)TemporaryMemoryBase;
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NewHeap = (VOID *)((UINTN)PermanentMemoryBase);
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2016-05-13 07:00:53 +02:00
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2019-01-23 09:12:38 +01:00
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OldStack = (VOID *)CurrentStack;
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//
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// The old stack is copied at the end of the stack region because stack grows down.
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//
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NewStack = (VOID *)((UINTN)PermanentMemoryBase - StackSize);
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} else {
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HeapSize = CopySize * PcdGet8 (PcdFspHeapSizePercentage) / 100;
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StackSize = CopySize - HeapSize;
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OldHeap = (VOID *)(UINTN)TemporaryMemoryBase;
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NewHeap = (VOID *)((UINTN)PermanentMemoryBase + StackSize);
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OldStack = (VOID *)((UINTN)TemporaryMemoryBase + HeapSize);
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NewStack = (VOID *)(UINTN)PermanentMemoryBase;
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}
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2021-12-05 23:53:59 +01:00
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2016-05-13 07:00:53 +02:00
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//
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// Migrate Heap
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//
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CopyMem (NewHeap, OldHeap, HeapSize);
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//
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// Migrate Stack
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//
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CopyMem (NewStack, OldStack, StackSize);
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//
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// We need *not* fix the return address because currently,
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// The PeiCore is executed in flash.
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//
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//
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// Rebase IDT table in permanent memory
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//
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AsmReadIdtr (&IdtDescriptor);
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IdtDescriptor.Base = IdtDescriptor.Base - (UINTN)OldStack + (UINTN)NewStack;
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AsmWriteIdtr (&IdtDescriptor);
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//
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// Fixed the FSP data pointer
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//
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FspDataPointerFixUp ((UINTN)NewStack - (UINTN)OldStack);
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//
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// SecSwitchStack function must be invoked after the memory migration
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2016-10-19 09:01:19 +02:00
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// immediately, also we need fixup the stack change caused by new call into
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// permanent memory.
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2016-05-13 07:00:53 +02:00
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//
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SecSwitchStack (
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2022-04-15 10:37:36 +02:00
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(UINTN)OldStack,
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(UINTN)NewStack
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2016-05-13 07:00:53 +02:00
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);
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return EFI_SUCCESS;
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}
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