2013-07-18 20:13:02 +02:00
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//
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// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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/* Secondary core pens for AArch64 Linux booting.
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This code it placed in Linux kernel memory and marked reserved. UEFI ensures
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that the secondary cores get to this pen and the kernel can then start the
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cores from here.
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NOTE: This code must be self-contained.
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*/
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#include <Library/ArmLib.h>
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.text
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.align 3
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2014-05-08 16:55:52 +02:00
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GCC_ASM_EXPORT(SecondariesPenStart)
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2013-07-18 20:13:02 +02:00
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ASM_GLOBAL SecondariesPenEnd
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ASM_PFX(SecondariesPenStart):
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// Registers x0-x3 are reserved for future use and should be set to zero.
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mov x0, xzr
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mov x1, xzr
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mov x2, xzr
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mov x3, xzr
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// Get core position. Taken from ArmPlatformGetCorePosition().
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// Assumes max 4 cores per cluster.
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mrs x4, mpidr_el1 // Get MPCore register.
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and x5, x4, #ARM_CORE_MASK // Get core number.
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and x4, x4, #ARM_CLUSTER_MASK // Get cluster number.
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add x4, x5, x4, LSR #6 // Add scaled cluster number to core number.
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lsl x4, x4, 3 // Get mailbox offset for this core.
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ldr x5, AsmMailboxbase // Get mailbox addr relative to pc (36 bytes ahead).
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add x4, x4, x5 // Add core mailbox offset to base of mailbox.
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1: ldr x5, [x4] // Load value from mailbox.
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cmp xzr, x5 // Has the mailbox been set?
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b.ne 2f // If so break out of loop.
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wfe // If not, wait a bit.
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b 1b // Wait over, check if mailbox set again.
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2: br x5 // Jump to mailbox value.
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.align 3 // Make sure the variable below is 8 byte aligned.
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.global AsmMailboxbase
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AsmMailboxbase: .xword 0xdeaddeadbeefbeef
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SecondariesPenEnd:
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