2015-03-31 03:06:23 +02:00
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/** @file
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2015-06-03 04:48:07 +02:00
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This PEIM will parse coreboot table in memory and report resource information into pei core.
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2015-03-31 03:06:23 +02:00
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This file contains the main entrypoint of the PEIM.
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2015-06-03 04:48:07 +02:00
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2015-06-03 04:44:28 +02:00
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Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
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2015-03-31 03:06:23 +02:00
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CbSupportPei.h"
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2015-06-03 04:44:28 +02:00
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#define LEGACY_8259_MASK_REGISTER_MASTER 0x21
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#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
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2015-03-31 03:06:23 +02:00
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EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
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2015-06-03 04:48:07 +02:00
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{ EfiACPIReclaimMemory, 0x008 },
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{ EfiACPIMemoryNVS, 0x004 },
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{ EfiReservedMemoryType, 0x004 },
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2015-03-31 03:06:23 +02:00
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{ EfiRuntimeServicesData, 0x080 },
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{ EfiRuntimeServicesCode, 0x080 },
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{ EfiMaxMemoryType, 0 }
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};
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EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
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{
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EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
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&gEfiPeiMasterBootModePpiGuid,
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NULL
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}
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};
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/**
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2015-06-03 04:48:07 +02:00
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Create memory mapped io resource hob.
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2015-03-31 03:06:23 +02:00
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@param MmioBase Base address of the memory mapped io range
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@param MmioSize Length of the memory mapped io range
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2015-06-03 04:48:07 +02:00
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2015-03-31 03:06:23 +02:00
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**/
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VOID
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BuildMemoryMappedIoRangeHob (
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EFI_PHYSICAL_ADDRESS MmioBase,
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UINT64 MmioSize
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)
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{
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2015-06-03 04:48:07 +02:00
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BuildResourceDescriptorHob (
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2015-03-31 03:06:23 +02:00
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EFI_RESOURCE_MEMORY_MAPPED_IO,
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(EFI_RESOURCE_ATTRIBUTE_PRESENT |
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EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
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EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_TESTED),
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MmioBase,
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MmioSize
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);
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2015-06-03 04:48:07 +02:00
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2015-03-31 03:06:23 +02:00
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BuildMemoryAllocationHob (
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MmioBase,
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MmioSize,
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EfiMemoryMappedIO
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2015-06-03 04:48:07 +02:00
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);
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2015-03-31 03:06:23 +02:00
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}
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/**
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Check the integrity of firmware volume header
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@param[in] FwVolHeader A pointer to a firmware volume header
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@retval TRUE The firmware volume is consistent
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@retval FALSE The firmware volume has corrupted.
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**/
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STATIC
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BOOLEAN
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IsFvHeaderValid (
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IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
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)
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{
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2015-06-03 04:48:07 +02:00
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UINT16 Checksum;
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// Skip nv storage fv
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if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
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return FALSE;
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}
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if ( (FwVolHeader->Revision != EFI_FVH_REVISION) ||
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(FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||
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(FwVolHeader->FvLength == ((UINTN) -1)) ||
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((FwVolHeader->HeaderLength & 0x01 ) !=0) ) {
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return FALSE;
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}
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Checksum = CalculateCheckSum16 ((UINT16 *) FwVolHeader, FwVolHeader->HeaderLength);
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2015-03-31 03:06:23 +02:00
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if (Checksum != 0) {
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DEBUG (( DEBUG_ERROR,
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"ERROR - Invalid Firmware Volume Header Checksum, change 0x%04x to 0x%04x\r\n",
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FwVolHeader->Checksum,
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(UINT16)( Checksum + FwVolHeader->Checksum )));
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return FALSE;
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}
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2015-06-03 04:48:07 +02:00
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return TRUE;
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2015-03-31 03:06:23 +02:00
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}
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/**
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Install FvInfo PPI and create fv hobs for remained fvs
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2015-06-03 04:48:07 +02:00
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2015-03-31 03:06:23 +02:00
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**/
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VOID
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CbPeiReportRemainedFvs (
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VOID
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)
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{
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2015-06-03 04:48:07 +02:00
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UINT8* TempPtr;
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UINT8* EndPtr;
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TempPtr = (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase);
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EndPtr = (UINT8* )(UINTN) (PcdGet32 (PcdPayloadFdMemBase) + PcdGet32 (PcdPayloadFdMemSize));
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for (;TempPtr < EndPtr;) {
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if (IsFvHeaderValid ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)) {
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if (TempPtr != (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase)) {
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// Skip the PEI FV
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DEBUG((EFI_D_ERROR, "Found one valid fv : 0x%lx.\n", TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength));
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PeiServicesInstallFvInfoPpi (
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NULL,
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(VOID *) (UINTN) TempPtr,
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(UINT32) (UINTN) ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength,
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NULL,
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NULL
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);
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BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN) TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength);
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}
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}
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TempPtr += ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength;
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}
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2015-03-31 03:06:23 +02:00
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}
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/**
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This is the entrypoint of PEIM
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2015-06-03 04:48:07 +02:00
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2015-03-31 03:06:23 +02:00
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@param FileHandle Handle of the file being invoked.
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@param PeiServices Describes the list of possible PEI Services.
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2015-06-03 04:48:07 +02:00
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@retval EFI_SUCCESS if it completed successfully.
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2015-03-31 03:06:23 +02:00
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**/
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EFI_STATUS
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EFIAPI
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CbPeiEntryPoint (
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IN EFI_PEI_FILE_HANDLE FileHandle,
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IN CONST EFI_PEI_SERVICES **PeiServices
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)
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{
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2015-06-03 04:48:07 +02:00
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EFI_STATUS Status;
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UINT64 LowMemorySize, HighMemorySize;
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UINT64 PeiMemSize = SIZE_64MB; // 64 MB
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EFI_PHYSICAL_ADDRESS PeiMemBase = 0;
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UINT32 RegEax;
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2015-03-31 03:06:23 +02:00
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UINT8 PhysicalAddressBits;
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VOID* pCbHeader;
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VOID* pAcpiTable;
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2015-06-03 04:48:07 +02:00
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UINT32 AcpiTableSize;
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VOID* pSmbiosTable;
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UINT32 SmbiosTableSize;
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SYSTEM_TABLE_INFO* pSystemTableInfo;
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FRAME_BUFFER_INFO FbInfo;
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FRAME_BUFFER_INFO* pFbInfo;
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ACPI_BOARD_INFO* pAcpiBoardInfo;
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UINTN PmCtrlRegBase, PmTimerRegBase, ResetRegAddress, ResetValue;
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2015-06-25 18:00:29 +02:00
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UINTN PmEvtBase;
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UINTN PmGpeEnBase;
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2015-06-03 04:48:07 +02:00
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LowMemorySize = 0;
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HighMemorySize = 0;
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Status = CbParseMemoryInfo (&LowMemorySize, &HighMemorySize);
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if (EFI_ERROR(Status))
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return Status;
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DEBUG((EFI_D_ERROR, "LowMemorySize: 0x%lx.\n", LowMemorySize));
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DEBUG((EFI_D_ERROR, "HighMemorySize: 0x%lx.\n", HighMemorySize));
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ASSERT (LowMemorySize > 0);
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2015-08-18 18:08:22 +02:00
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//
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// Report lower 640KB of RAM. Attribute EFI_RESOURCE_ATTRIBUTE_TESTED
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// is intentionally omitted to prevent erasing of the coreboot header
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// record before it is processed by CbParseMemoryInfo.
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//
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2015-06-03 04:48:07 +02:00
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BuildResourceDescriptorHob (
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2015-03-31 03:06:23 +02:00
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EFI_RESOURCE_SYSTEM_MEMORY,
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(
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EFI_RESOURCE_ATTRIBUTE_PRESENT |
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EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
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EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
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),
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(EFI_PHYSICAL_ADDRESS)(0),
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(UINT64)(0xA0000)
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);
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2015-06-03 04:48:07 +02:00
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BuildResourceDescriptorHob (
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2015-03-31 03:06:23 +02:00
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EFI_RESOURCE_MEMORY_RESERVED,
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(
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EFI_RESOURCE_ATTRIBUTE_PRESENT |
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EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
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EFI_RESOURCE_ATTRIBUTE_TESTED |
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EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
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),
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(EFI_PHYSICAL_ADDRESS)(0xA0000),
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(UINT64)(0x60000)
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);
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2015-06-03 04:48:07 +02:00
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2015-03-31 03:06:23 +02:00
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BuildResourceDescriptorHob (
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2015-06-03 04:48:07 +02:00
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EFI_RESOURCE_SYSTEM_MEMORY,
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(
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2015-03-31 03:06:23 +02:00
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EFI_RESOURCE_ATTRIBUTE_PRESENT |
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EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
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EFI_RESOURCE_ATTRIBUTE_TESTED |
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EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
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),
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(EFI_PHYSICAL_ADDRESS)(0x100000),
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(UINT64) (LowMemorySize - 0x100000)
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);
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2015-06-03 04:48:07 +02:00
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2015-03-31 03:06:23 +02:00
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if (HighMemorySize > 0) {
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2015-06-03 04:48:07 +02:00
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BuildResourceDescriptorHob (
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EFI_RESOURCE_SYSTEM_MEMORY,
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(
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2015-03-31 03:06:23 +02:00
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EFI_RESOURCE_ATTRIBUTE_PRESENT |
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EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
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EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
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),
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2015-04-10 04:41:10 +02:00
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(EFI_PHYSICAL_ADDRESS)(0x100000000ULL),
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2015-03-31 03:06:23 +02:00
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HighMemorySize
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2015-06-03 04:48:07 +02:00
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);
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}
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//
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// Should be 64k aligned
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//
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PeiMemBase = (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1));
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DEBUG((EFI_D_ERROR, "PeiMemBase: 0x%lx.\n", PeiMemBase));
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DEBUG((EFI_D_ERROR, "PeiMemSize: 0x%lx.\n", PeiMemSize));
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Status = PeiServicesInstallPeiMemory (
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PeiMemBase,
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PeiMemSize
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);
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ASSERT_EFI_ERROR (Status);
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//
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// Set cache on the physical memory
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//
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MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);
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2015-03-31 03:06:23 +02:00
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MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);
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2015-06-03 04:48:07 +02:00
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//
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2015-03-31 03:06:23 +02:00
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// Create Memory Type Information HOB
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//
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BuildGuidDataHob (
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&gEfiMemoryTypeInformationGuid,
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mDefaultMemoryTypeInformation,
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sizeof(mDefaultMemoryTypeInformation)
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);
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2015-06-03 04:48:07 +02:00
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//
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// Create Fv hob
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//
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CbPeiReportRemainedFvs ();
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BuildMemoryAllocationHob (
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2015-03-31 03:06:23 +02:00
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PcdGet32 (PcdPayloadFdMemBase),
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PcdGet32 (PcdPayloadFdMemSize),
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EfiBootServicesData
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);
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2015-06-03 04:48:07 +02:00
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2015-03-31 03:06:23 +02:00
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//
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// Build CPU memory space and IO space hob
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//
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AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
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if (RegEax >= 0x80000008) {
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2015-06-03 04:48:07 +02:00
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AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
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2015-03-31 03:06:23 +02:00
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PhysicalAddressBits = (UINT8) RegEax;
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} else {
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PhysicalAddressBits = 36;
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}
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//
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// Create a CPU hand-off information
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2015-06-03 04:48:07 +02:00
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//
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2015-03-31 03:06:23 +02:00
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BuildCpuHob (PhysicalAddressBits, 16);
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2015-06-03 04:48:07 +02:00
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2015-03-31 03:06:23 +02:00
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//
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// Report Local APIC range
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//
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BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB);
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2015-06-03 04:48:07 +02:00
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//
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// Boot mode
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//
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Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
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2015-03-31 03:06:23 +02:00
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ASSERT_EFI_ERROR (Status);
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2015-06-03 04:48:07 +02:00
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2015-03-31 03:06:23 +02:00
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Status = PeiServicesInstallPpi (mPpiBootMode);
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|
|
|
ASSERT_EFI_ERROR (Status);
|
2015-06-03 04:48:07 +02:00
|
|
|
|
2015-03-31 03:06:23 +02:00
|
|
|
//
|
|
|
|
// Set pcd to save the upper coreboot header in case the dxecore will
|
|
|
|
// erase 0~4k memory
|
|
|
|
//
|
|
|
|
pCbHeader = NULL;
|
2015-06-03 04:48:07 +02:00
|
|
|
if ((CbParseGetCbHeader (1, &pCbHeader) == RETURN_SUCCESS)
|
|
|
|
&& ((UINTN)pCbHeader > BASE_4KB)) {
|
|
|
|
DEBUG((EFI_D_ERROR, "Actual Coreboot header: %p.\n", pCbHeader));
|
|
|
|
PcdSet32 (PcdCbHeaderPointer, (UINT32)(UINTN)pCbHeader);
|
2015-03-31 03:06:23 +02:00
|
|
|
}
|
2015-06-03 04:48:07 +02:00
|
|
|
|
2015-03-31 03:06:23 +02:00
|
|
|
//
|
|
|
|
// Create guid hob for system tables like acpi table and smbios table
|
|
|
|
//
|
|
|
|
pAcpiTable = NULL;
|
|
|
|
AcpiTableSize = 0;
|
|
|
|
pSmbiosTable = NULL;
|
|
|
|
SmbiosTableSize = 0;
|
|
|
|
Status = CbParseAcpiTable (&pAcpiTable, &AcpiTableSize);
|
|
|
|
if (EFI_ERROR (Status)) {
|
2015-06-03 04:48:07 +02:00
|
|
|
// ACPI table is oblidgible
|
|
|
|
DEBUG ((EFI_D_ERROR, "Failed to find the required acpi table\n"));
|
|
|
|
ASSERT (FALSE);
|
2015-03-31 03:06:23 +02:00
|
|
|
}
|
|
|
|
CbParseSmbiosTable (&pSmbiosTable, &SmbiosTableSize);
|
2015-06-03 04:48:07 +02:00
|
|
|
|
|
|
|
pSystemTableInfo = NULL;
|
|
|
|
pSystemTableInfo = BuildGuidHob (&gUefiSystemTableInfoGuid, sizeof (SYSTEM_TABLE_INFO));
|
|
|
|
ASSERT (pSystemTableInfo != NULL);
|
|
|
|
pSystemTableInfo->AcpiTableBase = (UINT64) (UINTN)pAcpiTable;
|
|
|
|
pSystemTableInfo->AcpiTableSize = AcpiTableSize;
|
|
|
|
pSystemTableInfo->SmbiosTableBase = (UINT64) (UINTN)pSmbiosTable;
|
|
|
|
pSystemTableInfo->SmbiosTableSize = SmbiosTableSize;
|
|
|
|
DEBUG ((EFI_D_ERROR, "Detected Acpi Table at 0x%lx, length 0x%x\n", pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize));
|
|
|
|
DEBUG ((EFI_D_ERROR, "Detected Smbios Table at 0x%lx, length 0x%x\n", pSystemTableInfo->SmbiosTableBase, pSystemTableInfo->SmbiosTableSize));
|
|
|
|
DEBUG ((EFI_D_ERROR, "Create system table info guid hob\n"));
|
|
|
|
|
|
|
|
//
|
|
|
|
// Create guid hob for acpi board information
|
|
|
|
//
|
2015-06-25 18:00:29 +02:00
|
|
|
Status = CbParseFadtInfo (&PmCtrlRegBase, &PmTimerRegBase, &ResetRegAddress, &ResetValue, &PmEvtBase, &PmGpeEnBase);
|
2015-06-03 04:48:07 +02:00
|
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
pAcpiBoardInfo = NULL;
|
|
|
|
pAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));
|
|
|
|
ASSERT (pAcpiBoardInfo != NULL);
|
|
|
|
pAcpiBoardInfo->PmCtrlRegBase = (UINT64)PmCtrlRegBase;
|
|
|
|
pAcpiBoardInfo->PmTimerRegBase = (UINT64)PmTimerRegBase;
|
|
|
|
pAcpiBoardInfo->ResetRegAddress = (UINT64)ResetRegAddress;
|
|
|
|
pAcpiBoardInfo->ResetValue = (UINT8)ResetValue;
|
2015-06-25 18:00:29 +02:00
|
|
|
pAcpiBoardInfo->PmEvtBase = (UINT64)PmEvtBase;
|
|
|
|
pAcpiBoardInfo->PmGpeEnBase = (UINT64)PmGpeEnBase;
|
2015-06-03 04:48:07 +02:00
|
|
|
DEBUG ((EFI_D_ERROR, "Create acpi board info guid hob\n"));
|
|
|
|
|
|
|
|
//
|
|
|
|
// Create guid hob for frame buffer information
|
|
|
|
//
|
|
|
|
ZeroMem (&FbInfo, sizeof (FRAME_BUFFER_INFO));
|
|
|
|
Status = CbParseFbInfo (&FbInfo);
|
|
|
|
if (!EFI_ERROR (Status)) {
|
|
|
|
pFbInfo = BuildGuidHob (&gUefiFrameBufferInfoGuid, sizeof (FRAME_BUFFER_INFO));
|
|
|
|
ASSERT (pSystemTableInfo != NULL);
|
|
|
|
CopyMem (pFbInfo, &FbInfo, sizeof (FRAME_BUFFER_INFO));
|
|
|
|
DEBUG ((EFI_D_ERROR, "Create frame buffer info guid hob\n"));
|
|
|
|
}
|
2015-06-03 04:44:28 +02:00
|
|
|
|
|
|
|
//
|
|
|
|
// Mask off all legacy 8259 interrupt sources
|
|
|
|
//
|
|
|
|
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
|
|
|
|
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
|
|
|
|
|
2015-03-31 03:06:23 +02:00
|
|
|
return EFI_SUCCESS;
|
|
|
|
}
|
|
|
|
|