2014-01-09 22:55:03 +01:00
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/** @file
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Support for the PCI Express 3.0 standard.
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This header file may not define all structures. Please extend as required.
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2018-06-27 15:11:33 +02:00
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Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
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2019-04-04 01:06:00 +02:00
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SPDX-License-Identifier: BSD-2-Clause-Patent
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2014-01-09 22:55:03 +01:00
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**/
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#ifndef _PCIEXPRESS30_H_
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#define _PCIEXPRESS30_H_
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2016-05-27 15:43:45 +02:00
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#include <IndustryStandard/PciExpress21.h>
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#pragma pack(1)
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2014-01-09 22:55:03 +01:00
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#define PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_ID 0x0019
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#define PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_VER1 0x1
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2016-05-27 15:43:45 +02:00
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typedef union {
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struct {
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UINT32 PerformEqualization : 1;
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UINT32 LinkEqualizationRequestInterruptEnable : 1;
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UINT32 Reserved : 30;
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} Bits;
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UINT32 Uint32;
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} PCI_EXPRESS_REG_LINK_CONTROL3;
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typedef union {
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struct {
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UINT16 DownstreamPortTransmitterPreset : 4;
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UINT16 DownstreamPortReceiverPresetHint : 3;
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UINT16 Reserved : 1;
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UINT16 UpstreamPortTransmitterPreset : 4;
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UINT16 UpstreamPortReceiverPresetHint : 3;
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UINT16 Reserved2 : 1;
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} Bits;
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UINT16 Uint16;
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} PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL;
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2014-01-09 22:55:03 +01:00
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typedef struct {
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PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
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2016-05-27 15:43:45 +02:00
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PCI_EXPRESS_REG_LINK_CONTROL3 LinkControl3;
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2014-01-09 22:55:03 +01:00
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UINT32 LaneErrorStatus;
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2016-05-27 15:43:45 +02:00
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PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL EqualizationControl[2];
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2014-01-09 22:55:03 +01:00
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} PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE;
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2016-05-27 15:43:45 +02:00
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#pragma pack()
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2014-01-09 22:55:03 +01:00
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#endif
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