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audk/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf

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1. Correct File header to ## @file 2. Remove unnecessary .common] postfix on section. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10052 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-24 01:21:16 +01:00
## @file
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
# Base Synchronization Library implementation.
#
MdePkg: Remove X86 ASM and S files NASM has replaced ASM and S files. 1. Remove ASM from all modules. 2. Remove S files from the drivers only. 3. https://bugzilla.tianocore.org/show_bug.cgi?id=881 After NASM is updated, S files can be removed from Library. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2018-06-04 07:26:22 +02:00
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
Update the copyright notice format git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10413 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-23 18:26:26 +02:00
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
#
Update the copyright notice format git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10413 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-23 18:26:26 +02:00
# This program and the accompanying materials
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
Minor grammatical work--mostly adding periods. Items with ONLY period added did not have the heading date changed, but Items with content changes had heading copyright dates updated. Sending separately a list of files missing Doxygen @param and @return information. (PENDING) git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10604 6f19259b-4bc3-4df7-8a09-765794883524
2010-06-25 23:56:02 +02:00
# http://opensource.org/licenses/bsd-license.php.
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
1. Correct File header to ## @file 2. Remove unnecessary .common] postfix on section. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10052 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-24 01:21:16 +01:00
##
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = BaseSynchronizationLib
MdePkg: INF/DEC file updates to EDK II packages 1. Usage information in INF file comment blocks are either incomplete or incorrect. This includes usage information for Protocols/PPIs/GUIDs/PCDs/HOBs/Events/BootModes. The syntax for usage information in comment blocks is defined in the EDK II Module Information (INF) Specification Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15917 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-27 11:33:09 +02:00
MODULE_UNI_FILE = BaseSynchronizationLib.uni
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
FILE_GUID = FC9990DF-C5FF-44cf-8799-CBB45B577F87
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = SynchronizationLib
#
MdePkg/BaseSynchronizationLib: Added ARM Aarch64 architecture support Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14517 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-29 11:57:43 +02:00
# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
#
1. Correct File header to ## @file 2. Remove unnecessary .common] postfix on section. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10052 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-24 01:21:16 +01:00
[Sources]
Update to fix several ECC warning git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7600 6f19259b-4bc3-4df7-8a09-765794883524
2009-02-23 08:04:55 +01:00
BaseSynchronizationLibInternals.h
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
Add ARM support Add C inline versions of the IA32 and X64 assembly functions. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9112 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-18 23:02:42 +02:00
[Sources.IA32]
MdePkg/BaseSynchronizationLib: Add spin lock alignment for IA32/x64 From Intel(R) 64 and IA-32 Architectures Software Developer's Manual, one lock or semaphore is suggested to be present within a cache line. If the processors are based on Intel NetBurst microarchitecture, two cache lines are suggested. This could minimize the bus traffic required to service locks. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-03-21 06:36:50 +01:00
Ia32/InternalGetSpinLockProperties.c | MSFT
MdePkg: Clean up source files 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-27 15:11:33 +02:00
Ia32/InterlockedCompareExchange64.c | MSFT
Ia32/InterlockedCompareExchange32.c | MSFT
MdePkg/BaseSynchronizationLib: Add InterlockedCompareExchange16 This implements the function InterlockedCompareExchange16 () for all architectures, using architecture and toolchain specific intrinsics or primitive assembler instructions. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16966 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28 21:31:54 +01:00
Ia32/InterlockedCompareExchange16.c | MSFT
MdePkg: Clean up source files 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-27 15:11:33 +02:00
Ia32/InterlockedDecrement.c | MSFT
Ia32/InterlockedIncrement.c | MSFT
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
SynchronizationMsc.c | MSFT
MdePkg BaseSynchronizationLib: Convert Ia32/InterlockedCompareExchange64.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/InterlockedCompareExchange64.asm to Ia32/InterlockedCompareExchange64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-31 03:52:13 +02:00
Ia32/InterlockedCompareExchange64.nasm| INTEL
MdePkg BaseSynchronizationLib: Convert Ia32/InterlockedCompareExchange32.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/InterlockedCompareExchange32.asm to Ia32/InterlockedCompareExchange32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-31 03:52:13 +02:00
Ia32/InterlockedCompareExchange32.nasm| INTEL
MdePkg BaseSynchronizationLib: Convert Ia32/InterlockedCompareExchange16.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/InterlockedCompareExchange16.asm to Ia32/InterlockedCompareExchange16.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-31 03:52:13 +02:00
Ia32/InterlockedCompareExchange16.nasm| INTEL
MdePkg BaseSynchronizationLib: Convert Ia32/InterlockedDecrement.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/InterlockedDecrement.asm to Ia32/InterlockedDecrement.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-31 03:52:13 +02:00
Ia32/InterlockedDecrement.nasm| INTEL
MdePkg BaseSynchronizationLib: Convert Ia32/InterlockedIncrement.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/InterlockedIncrement.asm to Ia32/InterlockedIncrement.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-31 03:52:14 +02:00
Ia32/InterlockedIncrement.nasm| INTEL
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
Synchronization.c | INTEL
MdePkg/BaseSynchronizationLib: Add spin lock alignment for IA32/x64 From Intel(R) 64 and IA-32 Architectures Software Developer's Manual, one lock or semaphore is suggested to be present within a cache line. If the processors are based on Intel NetBurst microarchitecture, two cache lines are suggested. This could minimize the bus traffic required to service locks. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-03-21 06:36:50 +01:00
Ia32/InternalGetSpinLockProperties.c | GCC
1. Restore the inline C implementation of GCC assembly files that was temporarily removed in Svn r10045. 2. Remove 139 GCC assembly files whose functionality have been covered in the inline C implementation. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10503 6f19259b-4bc3-4df7-8a09-765794883524
2010-05-18 07:37:58 +02:00
Ia32/GccInline.c | GCC
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
SynchronizationGcc.c | GCC
[Sources.X64]
MdePkg/BaseSynchronizationLib: Add spin lock alignment for IA32/x64 From Intel(R) 64 and IA-32 Architectures Software Developer's Manual, one lock or semaphore is suggested to be present within a cache line. If the processors are based on Intel NetBurst microarchitecture, two cache lines are suggested. This could minimize the bus traffic required to service locks. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-03-21 06:36:50 +01:00
Ia32/InternalGetSpinLockProperties.c | MSFT
Update to fix several ECC warning git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7600 6f19259b-4bc3-4df7-8a09-765794883524
2009-02-23 08:04:55 +01:00
X64/InterlockedCompareExchange64.c | MSFT
X64/InterlockedCompareExchange32.c | MSFT
MdePkg/BaseSynchronizationLib: Add InterlockedCompareExchange16 This implements the function InterlockedCompareExchange16 () for all architectures, using architecture and toolchain specific intrinsics or primitive assembler instructions. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16966 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28 21:31:54 +01:00
X64/InterlockedCompareExchange16.c | MSFT
MdePkg: Clean up source files 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-27 15:11:33 +02:00
MdePkg BaseSynchronizationLib: Convert X64/InterlockedCompareExchange64.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedCompareExchange64.asm to X64/InterlockedCompareExchange64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-31 03:52:14 +02:00
X64/InterlockedCompareExchange64.nasm| INTEL
MdePkg BaseSynchronizationLib: Convert X64/InterlockedCompareExchange32.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedCompareExchange32.asm to X64/InterlockedCompareExchange32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-31 03:52:14 +02:00
X64/InterlockedCompareExchange32.nasm| INTEL
MdePkg BaseSynchronizationLib: Convert X64/InterlockedCompareExchange16.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedCompareExchange16.asm to X64/InterlockedCompareExchange16.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-31 03:52:14 +02:00
X64/InterlockedCompareExchange16.nasm| INTEL
MdePkg: Clean up source files 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-27 15:11:33 +02:00
X64/InterlockedDecrement.c | MSFT
X64/InterlockedIncrement.c | MSFT
SynchronizationMsc.c | MSFT
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
MdePkg BaseSynchronizationLib: Convert X64/InterlockedDecrement.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedDecrement.asm to X64/InterlockedDecrement.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-31 03:52:14 +02:00
X64/InterlockedDecrement.nasm| INTEL
MdePkg BaseSynchronizationLib: Convert X64/InterlockedIncrement.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedIncrement.asm to X64/InterlockedIncrement.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-31 03:52:14 +02:00
X64/InterlockedIncrement.nasm| INTEL
MdePkg: Clean up source files 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-27 15:11:33 +02:00
Synchronization.c | INTEL
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
MdePkg/BaseSynchronizationLib: Add spin lock alignment for IA32/x64 From Intel(R) 64 and IA-32 Architectures Software Developer's Manual, one lock or semaphore is suggested to be present within a cache line. If the processors are based on Intel NetBurst microarchitecture, two cache lines are suggested. This could minimize the bus traffic required to service locks. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-03-21 06:36:50 +01:00
Ia32/InternalGetSpinLockProperties.c | GCC
1. Restore the inline C implementation of GCC assembly files that was temporarily removed in Svn r10045. 2. Remove 139 GCC assembly files whose functionality have been covered in the inline C implementation. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10503 6f19259b-4bc3-4df7-8a09-765794883524
2010-05-18 07:37:58 +02:00
X64/GccInline.c | GCC
MdePkg: Clean up source files 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-27 15:11:33 +02:00
SynchronizationGcc.c | GCC
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
[Sources.IPF]
Ipf/Synchronization.c
Ipf/InterlockedCompareExchange64.s
Ipf/InterlockedCompareExchange32.s
MdePkg/BaseSynchronizationLib: Add InterlockedCompareExchange16 This implements the function InterlockedCompareExchange16 () for all architectures, using architecture and toolchain specific intrinsics or primitive assembler instructions. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16966 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28 21:31:54 +01:00
Ipf/InterlockedCompareExchange16.s
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
MdePkg/BaseSynchronizationLib: Add spin lock alignment for IA32/x64 From Intel(R) 64 and IA-32 Architectures Software Developer's Manual, one lock or semaphore is suggested to be present within a cache line. If the processors are based on Intel NetBurst microarchitecture, two cache lines are suggested. This could minimize the bus traffic required to service locks. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-03-21 06:36:50 +01:00
Ipf/InternalGetSpinLockProperties.c | MSFT
Ipf/InternalGetSpinLockProperties.c | GCC
MdePkg: Clean up source files 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-27 15:11:33 +02:00
Synchronization.c | INTEL
SynchronizationMsc.c | MSFT
SynchronizationGcc.c | GCC
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
[Sources.EBC]
Synchronization.c
Ebc/Synchronization.c
Make EOL consistent git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9115 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-19 00:14:01 +02:00
[Sources.ARM]
Synchronization.c
MdePkg/BaseSynchronizationLib: Added proper support for ARM architecture This implements the following synchronization primitives for AArch64 (GCC) and ARM (GCC & RVCT): InternalSyncCompareExchange32 InternalSyncCompareExchange64 InternalSyncIncrement InternalSyncDecrement Note: these functions are implemented using the exclusive monitor, which implies that they can only be used after the caches (and hence the MMU) have been enabled. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16965 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28 21:31:40 +01:00
Arm/Synchronization.asm | RVCT
Arm/Synchronization.S | GCC
Make EOL consistent git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9115 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-19 00:14:01 +02:00
MdePkg/BaseSynchronizationLib: Added ARM Aarch64 architecture support Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14517 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-29 11:57:43 +02:00
[Sources.AARCH64]
Synchronization.c
MdePkg/Library/BaseSynchronizationLib: Enable VS2017/ARM64 builds Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-03-28 17:55:20 +02:00
AArch64/Synchronization.S | GCC
AArch64/Synchronization.asm | MSFT
MdePkg/BaseSynchronizationLib: Added ARM Aarch64 architecture support Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14517 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-29 11:57:43 +02:00
Split out Synchronization Library from Base Library git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30 01:45:13 +01:00
[Packages]
MdePkg/MdePkg.dec
[LibraryClasses]
PcdLib
TimerLib
DebugLib
BaseMemoryLib
1. Correct File header to ## @file 2. Remove unnecessary .common] postfix on section. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10052 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-24 01:21:16 +01:00
[Pcd]
MdePkg: INF/DEC file updates to EDK II packages 1. Usage information in INF file comment blocks are either incomplete or incorrect. This includes usage information for Protocols/PPIs/GUIDs/PCDs/HOBs/Events/BootModes. The syntax for usage information in comment blocks is defined in the EDK II Module Information (INF) Specification Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15917 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-27 11:33:09 +02:00
gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout ## SOMETIMES_CONSUMES