mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg/Sec: Clean and Move all declaration into 'SecInternal.h'
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12417 6f19259b-4bc3-4df7-8a09-765794883524
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oliviermartin
parent
f92b93c9a3
commit
009f583fa0
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@ -15,18 +15,14 @@
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#include <Base.h>
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#include <AutoGen.h>
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#start of the code section
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.text
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.align 5
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# IMPORT
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GCC_ASM_IMPORT(SecCommonExceptionEntry)
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# EXPORT
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GCC_ASM_EXPORT(SecVectorTable)
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//============================================================
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//Default Exception Handlers
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// Default Exception Handlers
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//============================================================
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@ -1,5 +1,5 @@
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/** @file
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* Main file supporting the SEC Phase for Versatile Express
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* Main file supporting the SEC Phase on ARM Platforms
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*
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* Copyright (c) 2011, ARM Limited. All rights reserved.
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*
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@ -13,55 +13,21 @@
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*
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**/
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#include <Library/DebugLib.h>
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#include <Library/DebugAgentLib.h>
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#include <Library/PcdLib.h>
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#include <Library/PrintLib.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/ArmLib.h>
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#include <Library/SerialPortLib.h>
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#include <Library/ArmPlatformLib.h>
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#include <Chipset/ArmV7.h>
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#include <Library/ArmGicLib.h>
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#include "SecInternal.h"
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#define SerialPrint(txt) SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
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extern VOID *monitor_vector_table;
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VOID
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ArmSetupGicNonSecure (
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IN INTN GicDistributorBase,
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IN INTN GicInterruptInterfaceBase
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);
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// Vector Table for Sec Phase
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VOID
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SecVectorTable (
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VOID
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);
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VOID
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NonSecureWaitForFirmware (
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VOID
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);
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VOID
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enter_monitor_mode(
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IN VOID* Stack
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);
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VOID
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return_from_exception (
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IN UINTN NonSecureBase
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);
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VOID
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copy_cpsr_into_spsr (
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VOID
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);
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VOID
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CEntryPoint (
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IN UINTN MpId
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@ -74,7 +40,7 @@ CEntryPoint (
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// Primary CPU clears out the SCU tag RAMs, secondaries wait
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if (IS_PRIMARY_CORE(MpId)) {
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if (FixedPcdGet32(PcdMPCoreSupport)) {
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ArmInvalidScu();
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ArmInvalidScu ();
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}
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// SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
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@ -97,20 +63,20 @@ CEntryPoint (
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// Invalidate the data cache. Doesn't have to do the Data cache clean.
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ArmInvalidateDataCache();
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//Invalidate Instruction Cache
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// Invalidate Instruction Cache
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ArmInvalidateInstructionCache();
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//Invalidate I & D TLBs
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// Invalidate I & D TLBs
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ArmInvalidateInstructionAndDataTlb();
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// Enable Full Access to CoProcessors
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ArmWriteCPACR (CPACR_CP_FULL_ACCESS);
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// Enable SWP instructions
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ArmEnableSWPInstruction();
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ArmEnableSWPInstruction ();
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// Enable program flow prediction, if supported.
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ArmEnableBranchPrediction();
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ArmEnableBranchPrediction ();
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if (FixedPcdGet32(PcdVFPEnabled)) {
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ArmEnableVFP();
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@ -133,7 +99,11 @@ CEntryPoint (
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}
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// Test if Trustzone is supported on this platform
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if (ArmPlatformTrustzoneSupported()) {
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if (ArmPlatformTrustzoneSupported ()) {
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// Ensure the Monitor Stack Base & Size have been set
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ASSERT(PcdGet32(PcdCPUCoresSecMonStackBase) != 0);
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ASSERT(PcdGet32(PcdCPUCoreSecMonStackSize) != 0);
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if (FixedPcdGet32(PcdMPCoreSupport)) {
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// Setup SMP in Non Secure world
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ArmSetupSmpNonSecure (GET_CORE_ID(MpId));
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@ -148,7 +118,7 @@ CEntryPoint (
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//-------------------- Monitor Mode ---------------------
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// Setup the Trustzone Chipsets
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if (IS_PRIMARY_CORE(MpId)) {
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ArmPlatformTrustzoneInit();
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ArmPlatformTrustzoneInit ();
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// Wake up the secondary cores by sending a interrupt to everyone else
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// NOTE 1: The Software Generated Interrupts are always enabled on Cortex-A9
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@ -185,11 +155,11 @@ CEntryPoint (
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// - Enable Access to Preload Engine in NS World
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// - Enable lockable TLB entries allocation in NS world
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// - Enable R/W access to SMP bit of Auxiliary Control Register in NS world
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ArmWriteNsacr(NSACR_NS_SMP | NSACR_TL | NSACR_PLE | NSACR_CP(10) | NSACR_CP(11));
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ArmWriteNsacr (NSACR_NS_SMP | NSACR_TL | NSACR_PLE | NSACR_CP(10) | NSACR_CP(11));
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// CP15 Secure Configuration Register with Non Secure bit (SCR_NS), CPSR.A modified in any
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// security state (SCR_AW), CPSR.F modified in any security state (SCR_FW)
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ArmWriteScr(SCR_NS | SCR_FW | SCR_AW);
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ArmWriteScr (SCR_NS | SCR_FW | SCR_AW);
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} else {
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if (IS_PRIMARY_CORE(MpId)) {
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SerialPrint ("Trust Zone Configuration is disabled\n\r");
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