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UefiPayloadPkg: Update PayloadLoader to suport FDT.
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786 Create FDT nodes (reserved-memory, serial, pci-rb, options) in FdtPpiNotifyCallback function right after gEfiEndOfPeiSignalPpiGuid. Signed-off-by: Linus Liu <linus.liu@intel.com>
This commit is contained in:
parent
b0c6b049c4
commit
0c4d6bb405
@ -6,18 +6,34 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#include <PiPei.h>
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#include <UniversalPayload/UniversalPayload.h>
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#include <UniversalPayload/DeviceTree.h>
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#include <Guid/UniversalPayloadBase.h>
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#include <UniversalPayload/ExtraData.h>
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#include <UniversalPayload/DeviceTree.h>
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#include <Ppi/LoadFile.h>
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#include <Library/PciHostBridgeLib.h>
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#include <Protocol/DevicePath.h>
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#include <Library/DebugLib.h>
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#include <Library/HobLib.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/FdtLib.h>
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#include <Library/PrintLib.h>
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#include <Library/PeiServicesLib.h>
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#include "FitLib.h"
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#define STACK_SIZE 0x20000
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CONST EFI_PEI_PPI_DESCRIPTOR gReadyToPayloadSignalPpi = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gUplReadyToPayloadPpiGuid,
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NULL
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};
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EFI_PEI_PPI_DESCRIPTOR mEndOfPeiSignalPpi = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiEndOfPeiSignalPpiGuid,
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NULL
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};
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/**
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The wrapper function of PeiLoadImageLoadImage().
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@ -50,6 +66,15 @@ PeiLoadFileLoadPayload (
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UINTN Delta;
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UINTN Index;
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#if (FixedPcdGetBool (PcdHandOffFdtEnable))
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VOID *BaseOfStack;
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VOID *TopOfStack;
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UNIVERSAL_PAYLOAD_DEVICE_TREE *Fdt;
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VOID *Hob;
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Fdt = NULL;
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#endif
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Instance = 0;
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do {
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Status = PeiServicesFfsFindSectionData3 (EFI_SECTION_RAW, Instance++, FileHandle, &Binary, AuthenticationState);
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@ -66,13 +91,15 @@ PeiLoadFileLoadPayload (
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return Status;
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}
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DEBUG ((
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DEBUG_INFO,
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"Before Rebase Payload File Base: 0x%08x, File Size: 0x%08X, EntryPoint: 0x%08x\n",
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Context.PayloadBaseAddress,
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Context.PayloadSize,
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Context.PayloadEntryPoint
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));
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DEBUG (
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(
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DEBUG_INFO,
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"Before Rebase Payload File Base: 0x%08x, File Size: 0x%08X, EntryPoint: 0x%08x\n",
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Context.PayloadBaseAddress,
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Context.PayloadSize,
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Context.PayloadEntryPoint
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)
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);
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Context.PayloadBaseAddress = (EFI_PHYSICAL_ADDRESS)AllocatePages (EFI_SIZE_TO_PAGES (Context.PayloadSize));
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RelocateTable = (FIT_RELOCATE_ITEM *)(UINTN)(Context.PayloadBaseAddress + Context.RelocateTableOffset);
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@ -96,13 +123,15 @@ PeiLoadFileLoadPayload (
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}
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}
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DEBUG ((
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DEBUG_INFO,
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"After Rebase Payload File Base: 0x%08x, File Size: 0x%08X, EntryPoint: 0x%08x\n",
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Context.PayloadBaseAddress,
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Context.PayloadSize,
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Context.PayloadEntryPoint
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));
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DEBUG (
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(
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DEBUG_INFO,
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"After Rebase Payload File Base: 0x%08x, File Size: 0x%08X, EntryPoint: 0x%08x\n",
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Context.PayloadBaseAddress,
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Context.PayloadSize,
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Context.PayloadEntryPoint
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)
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);
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Length = sizeof (UNIVERSAL_PAYLOAD_BASE);
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PayloadBase = BuildGuidHob (
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@ -115,6 +144,42 @@ PeiLoadFileLoadPayload (
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*ImageSizeArg = Context.PayloadSize;
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*EntryPoint = Context.PayloadEntryPoint;
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Status = PeiServicesInstallPpi (&mEndOfPeiSignalPpi);
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ASSERT_EFI_ERROR (Status);
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Status = PeiServicesInstallPpi (&gReadyToPayloadSignalPpi);
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ASSERT_EFI_ERROR (Status);
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#if (FixedPcdGetBool (PcdHandOffFdtEnable))
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Hob = GetFirstGuidHob (&gUniversalPayloadDeviceTreeGuid);
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if (Hob != NULL) {
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Fdt = (UNIVERSAL_PAYLOAD_DEVICE_TREE *)GET_GUID_HOB_DATA (Hob);
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}
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//
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// Allocate 128KB for the Stack
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//
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BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
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ASSERT (BaseOfStack != NULL);
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//
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// Compute the top of the stack we were allocated. Pre-allocate a UINTN
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// for safety.
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//
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TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
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TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
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//
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// Transfer the control to the entry point of UniveralPayloadEntry.
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//
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SwitchStack (
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(SWITCH_STACK_ENTRY_POINT)(UINTN)Context.PayloadEntryPoint,
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(VOID *)(Fdt->DeviceTreeAddress),
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NULL,
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TopOfStack
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);
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#endif
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return EFI_SUCCESS;
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}
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@ -128,11 +193,148 @@ EFI_PEI_PPI_DESCRIPTOR gPpiLoadFilePpiList = {
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&mPeiLoadFilePpi
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};
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#if (FixedPcdGetBool (PcdHandOffFdtEnable))
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/**
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Discover Hobs data and report data into a FDT.
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@param[in] PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
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@param[in] NotifyDescriptor Address of the notification descriptor data structure.
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@param[in] Ppi Address of the PPI that was installed.
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@retval EFI_SUCCESS Hobs data is discovered.
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@return Others No Hobs data is discovered.
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**/
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EFI_STATUS
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EFIAPI
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FdtPpiNotifyCallback (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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);
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EFI_PEI_NOTIFY_DESCRIPTOR mReadyToPayloadNotifyList[] = {
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{
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(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gUplReadyToPayloadPpiGuid,
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FdtPpiNotifyCallback
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}
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};
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#endif
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/**
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Print FDT data.
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@param[in] FdtBase Address of the Fdt data.
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**/
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VOID
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PrintFdt (
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IN VOID *FdtBase
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)
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{
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UINT8 *Fdt;
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UINT32 i;
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Fdt = NULL;
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i = 0;
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DEBUG ((DEBUG_ERROR, "FDT DTB data:"));
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for (Fdt = FdtBase, i = 0; i < Fdt32ToCpu (((FDT_HEADER *)FdtBase)->TotalSize); i++, Fdt++) {
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if (i % 16 == 0) {
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DEBUG ((DEBUG_ERROR, "\n"));
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}
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DEBUG ((DEBUG_ERROR, "%02x ", *Fdt));
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}
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DEBUG ((DEBUG_ERROR, "\n"));
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}
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/**
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It will build FDT for UPL consumed.
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@param[in] FdtBase Address of the Fdt data.
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@retval EFI_SUCCESS If it completed successfully.
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@retval Others If it failed to build required FDT.
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**/
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EFI_STATUS
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BuildFdtForUPL (
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IN VOID *FdtBase
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);
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#if (FixedPcdGetBool (PcdHandOffFdtEnable))
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/**
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Discover Hobs data and report data into a FDT.
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@param[in] PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
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@param[in] NotifyDescriptor Address of the notification descriptor data structure.
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@param[in] Ppi Address of the PPI that was installed.
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@retval EFI_SUCCESS Hobs data is discovered.
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@return Others No Hobs data is discovered.
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**/
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EFI_STATUS
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EFIAPI
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FdtPpiNotifyCallback (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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)
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{
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EFI_STATUS Status;
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UNIVERSAL_PAYLOAD_DEVICE_TREE *Fdt;
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UINT32 FdtSize;
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UINTN FdtPages;
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VOID *FdtBase;
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UINT32 Data32;
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Fdt = NULL;
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FdtSize = PcdGet8 (PcdFDTPageSize) * EFI_PAGE_SIZE;
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FdtPages = EFI_SIZE_TO_PAGES (FdtSize);
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FdtBase = AllocatePages (FdtPages);
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if (FdtBase == NULL) {
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DEBUG ((DEBUG_ERROR, "%a: AllocatePages failed\n", __func__));
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return EFI_NOT_FOUND;
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}
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Status = FdtCreateEmptyTree (FdtBase, (UINT32)FdtSize);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "%a: cannot create FDT\n", __func__));
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}
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// Set cell property of root node
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Data32 = CpuToFdt32 (2);
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Status = FdtSetProp (FdtBase, 0, "#address-cells", &Data32, sizeof (UINT32));
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Status = FdtSetProp (FdtBase, 0, "#size-cells", &Data32, sizeof (UINT32));
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Status = BuildFdtForUPL (FdtBase);
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ASSERT_EFI_ERROR (Status);
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PrintFdt (FdtBase);
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Fdt = BuildGuidHob (&gUniversalPayloadDeviceTreeGuid, sizeof (UNIVERSAL_PAYLOAD_DEVICE_TREE));
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if (Fdt == NULL) {
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DEBUG ((DEBUG_ERROR, "%a: Build FDT Hob failed\n", __func__));
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return EFI_NOT_FOUND;
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}
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DEBUG ((
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DEBUG_ERROR,
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"%a: fdt at 0x%x (size %d)\n",
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__func__,
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FdtBase,
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Fdt32ToCpu (((FDT_HEADER *)FdtBase)->TotalSize)
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));
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Fdt->Header.Revision = UNIVERSAL_PAYLOAD_DEVICE_TREE_REVISION;
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Fdt->Header.Length = sizeof (UNIVERSAL_PAYLOAD_DEVICE_TREE);
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Fdt->DeviceTreeAddress = (UINT64)FdtBase;
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return Status;
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}
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#endif
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/**
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Install Pei Load File PPI.
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@param FileHandle Handle of the file being invoked.
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@param PeiServices Describes the list of possible PEI Services.
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@retval EFI_SUCCESS The entry point executes successfully.
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@retval EFI_SUCESS The entry point executes successfully.
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@retval Others Some error occurs during the execution of this function.
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**/
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EFI_STATUS
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@ -146,5 +348,13 @@ InitializeFitPayloadLoaderPeim (
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Status = PeiServicesInstallPpi (&gPpiLoadFilePpiList);
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#if (FixedPcdGetBool (PcdHandOffFdtEnable))
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//
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// Build FDT in end of PEI notify callback.
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//
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Status = PeiServicesNotifyPpi (&mReadyToPayloadNotifyList[0]);
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ASSERT_EFI_ERROR (Status);
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#endif
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return Status;
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}
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@ -35,7 +35,6 @@
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[LibraryClasses]
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PcdLib
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MemoryAllocationLib
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BaseMemoryLib
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PeiServicesLib
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HobLib
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@ -43,17 +42,27 @@
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PeimEntryPoint
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DebugLib
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FdtLib
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##for testing, remove this for HandOffFdtEnable == FALSE scenario: BuildFdtLib
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##Hook this lib to FitPayloadLoaderPeim.inf in platform DSC when HandOffFdtEnable == TRUE.
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[Ppis]
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gEfiPeiLoadFilePpiGuid ## PRODUCES
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gUplReadyToPayloadPpiGuid ## PRODUCES
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gEfiEndOfPeiSignalPpiGuid ## CONSUMES
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[Pcd]
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister
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gUefiPayloadPkgTokenSpaceGuid.PcdHandOffFdtEnable
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gUefiPayloadPkgTokenSpaceGuid.PcdFDTPageSize
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[Guids]
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gUniversalPayloadExtraDataGuid ## PRODUCES
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gUniversalPayloadBaseGuid ## PRODUCES
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gUniversalPayloadDeviceTreeGuid ## CONSUMES
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gEfiGraphicsInfoHobGuid ## CONSUMES
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gUniversalPayloadPciRootBridgeInfoGuid ## CONSUMES
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gUniversalPayloadAcpiTableGuid ## CONSUMES
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gUniversalPayloadSerialPortParentDeviceInfoGuid
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[Depex]
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TRUE
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@ -17,9 +17,49 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#include <Library/PeiServicesLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Guid/UniversalPayloadBase.h>
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#include "ElfLib.h"
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CONST EFI_PEI_PPI_DESCRIPTOR gReadyToPayloadSignalPpi = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gUplReadyToPayloadPpiGuid,
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NULL
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};
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/**
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Notify ReadyToPayLoad signal.
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@param[in] PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
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@param[in] NotifyDescriptor Address of the notification descriptor data structure.
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@param[in] Ppi Address of the PPI that was installed.
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@retval EFI_SUCCESS Hobs data is discovered.
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@return Others No Hobs data is discovered.
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**/
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EFI_STATUS
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EFIAPI
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EndOfPeiPpiNotifyCallback (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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)
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{
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EFI_STATUS Status;
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//
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// Ready to Payload phase signal
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//
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Status = PeiServicesInstallPpi (&gReadyToPayloadSignalPpi);
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return Status;
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}
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EFI_PEI_NOTIFY_DESCRIPTOR mEndOfPeiNotifyList[] = {
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{
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(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiEndOfPeiSignalPpiGuid,
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EndOfPeiPpiNotifyCallback
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}
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};
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/**
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The wrapper function of PeiLoadImageLoadImage().
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@ -47,6 +87,7 @@ PeiLoadFileLoadPayload (
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EFI_STATUS Status;
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VOID *Elf;
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UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
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UNIVERSAL_PAYLOAD_BASE *PayloadBase;
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ELF_IMAGE_CONTEXT Context;
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UINT32 Index;
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UINT16 ExtraDataIndex;
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@ -73,13 +114,22 @@ PeiLoadFileLoadPayload (
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Status = ParseElfImage (Elf, &Context);
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} while (EFI_ERROR (Status));
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DEBUG ((
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DEBUG_INFO,
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"Payload File Size: 0x%08X, Mem Size: 0x%08x, Reload: %d\n",
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Context.FileSize,
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Context.ImageSize,
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Context.ReloadRequired
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));
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Length = sizeof (UNIVERSAL_PAYLOAD_BASE);
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PayloadBase = BuildGuidHob (
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&gUniversalPayloadBaseGuid,
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Length
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);
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PayloadBase->Entry = (EFI_PHYSICAL_ADDRESS)Context.FileBase;
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DEBUG (
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(
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DEBUG_INFO,
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"Payload File Size: 0x%08X, Mem Size: 0x%08x, Reload: %d\n",
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Context.FileSize,
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Context.ImageSize,
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Context.ReloadRequired
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)
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);
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//
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// Get UNIVERSAL_PAYLOAD_INFO_HEADER and number of additional PLD sections.
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@ -153,6 +203,11 @@ PeiLoadFileLoadPayload (
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*ImageSizeArg = Context.ImageSize;
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}
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DEBUG ((DEBUG_INFO, "LoadElfImage :%r, EntryPoint :%x\n", Status, (UINTN)Context.EntryPoint));
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Status = PeiServicesNotifyPpi (&mEndOfPeiNotifyList[0]);
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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|
@ -52,6 +52,8 @@
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[Ppis]
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gEfiPeiLoadFilePpiGuid ## PRODUCES
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gEfiEndOfPeiSignalPpiGuid ## CONSUMES
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gUplReadyToPayloadPpiGuid ## PRODUCES
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[Pcd]
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister
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@ -59,6 +61,16 @@
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[Guids]
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gUniversalPayloadExtraDataGuid ## PRODUCES
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gUniversalPayloadBaseGuid ## PRODUCES
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[Depex]
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TRUE
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[BuildOptions]
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MSFT:*_*_*_CC_FLAGS = /wd4244
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GCC:*_*_IA32_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast
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GCC:*_*_X64_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast
|
||||
GCC:*_*_ARM_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast
|
||||
GCC:*_*_AARCH64_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast
|
||||
GCC:*_*_RISCV64_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast
|
||||
GCC:*_*_LOONGARCH64_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast
|
||||
|
405
UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFuncFit.c
Normal file
405
UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFuncFit.c
Normal file
@ -0,0 +1,405 @@
|
||||
/** @file
|
||||
Ia32-specific functionality for DxeLoad.
|
||||
|
||||
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
**/
|
||||
|
||||
#include <PiPei.h>
|
||||
#include <Library/BaseLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/MemoryAllocationLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
#include <Library/HobLib.h>
|
||||
#include <Library/FdtLib.h>
|
||||
#include "VirtualMemory.h"
|
||||
#include "UefiPayloadEntry.h"
|
||||
|
||||
#define STACK_SIZE 0x20000
|
||||
#define IDT_ENTRY_COUNT 32
|
||||
|
||||
extern VOID *mHobList;
|
||||
|
||||
typedef struct _X64_IDT_TABLE {
|
||||
//
|
||||
// Reserved 4 bytes preceding PeiService and IdtTable,
|
||||
// since IDT base address should be 8-byte alignment.
|
||||
//
|
||||
UINT32 Reserved;
|
||||
CONST EFI_PEI_SERVICES **PeiService;
|
||||
X64_IDT_GATE_DESCRIPTOR IdtTable[IDT_ENTRY_COUNT];
|
||||
} X64_IDT_TABLE;
|
||||
|
||||
//
|
||||
// Global Descriptor Table (GDT)
|
||||
//
|
||||
GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {
|
||||
/* selector { Global Segment Descriptor } */
|
||||
/* 0x00 */ {
|
||||
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
|
||||
}, // null descriptor
|
||||
/* 0x08 */ {
|
||||
{ 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
|
||||
}, // linear data segment descriptor
|
||||
/* 0x10 */ {
|
||||
{ 0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
|
||||
}, // linear code segment descriptor
|
||||
/* 0x18 */ {
|
||||
{ 0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
|
||||
}, // system data segment descriptor
|
||||
/* 0x20 */ {
|
||||
{ 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
|
||||
}, // system code segment descriptor
|
||||
/* 0x28 */ {
|
||||
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
|
||||
}, // spare segment descriptor
|
||||
/* 0x30 */ {
|
||||
{ 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
|
||||
}, // system data segment descriptor
|
||||
/* 0x38 */ {
|
||||
{ 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0 }
|
||||
}, // system code segment descriptor
|
||||
/* 0x40 */ {
|
||||
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
|
||||
}, // spare segment descriptor
|
||||
};
|
||||
|
||||
//
|
||||
// IA32 Gdt register
|
||||
//
|
||||
GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {
|
||||
sizeof (gGdtEntries) - 1,
|
||||
(UINTN)gGdtEntries
|
||||
};
|
||||
|
||||
GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {
|
||||
sizeof (X64_IDT_GATE_DESCRIPTOR) * IDT_ENTRY_COUNT - 1,
|
||||
0
|
||||
};
|
||||
|
||||
/**
|
||||
Allocates and fills in the Page Directory and Page Table Entries to
|
||||
establish a 4G page table.
|
||||
|
||||
@param[in] StackBase Stack base address.
|
||||
@param[in] StackSize Stack size.
|
||||
|
||||
@return The address of page table.
|
||||
|
||||
**/
|
||||
UINTN
|
||||
Create4GPageTablesIa32Pae (
|
||||
IN EFI_PHYSICAL_ADDRESS StackBase,
|
||||
IN UINTN StackSize
|
||||
)
|
||||
{
|
||||
UINT8 PhysicalAddressBits;
|
||||
EFI_PHYSICAL_ADDRESS PhysicalAddress;
|
||||
UINTN IndexOfPdpEntries;
|
||||
UINTN IndexOfPageDirectoryEntries;
|
||||
UINT32 NumberOfPdpEntriesNeeded;
|
||||
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
|
||||
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
|
||||
PAGE_TABLE_ENTRY *PageDirectoryEntry;
|
||||
UINTN TotalPagesNum;
|
||||
UINTN PageAddress;
|
||||
UINT64 AddressEncMask;
|
||||
|
||||
//
|
||||
// Make sure AddressEncMask is contained to smallest supported address field
|
||||
//
|
||||
AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
|
||||
|
||||
PhysicalAddressBits = 32;
|
||||
|
||||
//
|
||||
// Calculate the table entries needed.
|
||||
//
|
||||
NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));
|
||||
|
||||
TotalPagesNum = NumberOfPdpEntriesNeeded + 1;
|
||||
PageAddress = (UINTN)AllocatePageTableMemory (TotalPagesNum);
|
||||
ASSERT (PageAddress != 0);
|
||||
|
||||
PageMap = (VOID *)PageAddress;
|
||||
PageAddress += SIZE_4KB;
|
||||
|
||||
PageDirectoryPointerEntry = PageMap;
|
||||
PhysicalAddress = 0;
|
||||
|
||||
for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
|
||||
//
|
||||
// Each Directory Pointer entries points to a page of Page Directory entires.
|
||||
// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
|
||||
//
|
||||
PageDirectoryEntry = (VOID *)PageAddress;
|
||||
PageAddress += SIZE_4KB;
|
||||
|
||||
//
|
||||
// Fill in a Page Directory Pointer Entries
|
||||
//
|
||||
PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
|
||||
PageDirectoryPointerEntry->Bits.Present = 1;
|
||||
|
||||
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress += SIZE_2MB) {
|
||||
if ( (IsNullDetectionEnabled () && (PhysicalAddress == 0))
|
||||
|| ( (PhysicalAddress < StackBase + StackSize)
|
||||
&& ((PhysicalAddress + SIZE_2MB) > StackBase)))
|
||||
{
|
||||
//
|
||||
// Need to split this 2M page that covers stack range.
|
||||
//
|
||||
Split2MPageTo4K (PhysicalAddress, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, 0, 0);
|
||||
} else {
|
||||
//
|
||||
// Fill in the Page Directory entries
|
||||
//
|
||||
PageDirectoryEntry->Uint64 = (UINT64)PhysicalAddress | AddressEncMask;
|
||||
PageDirectoryEntry->Bits.ReadWrite = 1;
|
||||
PageDirectoryEntry->Bits.Present = 1;
|
||||
PageDirectoryEntry->Bits.MustBe1 = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for ( ; IndexOfPdpEntries < 512; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
|
||||
ZeroMem (
|
||||
PageDirectoryPointerEntry,
|
||||
sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)
|
||||
);
|
||||
}
|
||||
|
||||
//
|
||||
// Protect the page table by marking the memory used for page table to be
|
||||
// read-only.
|
||||
//
|
||||
EnablePageTableProtection ((UINTN)PageMap, FALSE);
|
||||
|
||||
return (UINTN)PageMap;
|
||||
}
|
||||
|
||||
/**
|
||||
The function will check if IA32 PAE is supported.
|
||||
|
||||
@retval TRUE IA32 PAE is supported.
|
||||
@retval FALSE IA32 PAE is not supported.
|
||||
|
||||
**/
|
||||
BOOLEAN
|
||||
IsIa32PaeSupport (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
UINT32 RegEax;
|
||||
UINT32 RegEdx;
|
||||
BOOLEAN Ia32PaeSupport;
|
||||
|
||||
Ia32PaeSupport = FALSE;
|
||||
AsmCpuid (0x0, &RegEax, NULL, NULL, NULL);
|
||||
if (RegEax >= 0x1) {
|
||||
AsmCpuid (0x1, NULL, NULL, NULL, &RegEdx);
|
||||
if ((RegEdx & BIT6) != 0) {
|
||||
Ia32PaeSupport = TRUE;
|
||||
}
|
||||
}
|
||||
|
||||
return Ia32PaeSupport;
|
||||
}
|
||||
|
||||
/**
|
||||
The function will check if page table should be setup or not.
|
||||
|
||||
@retval TRUE Page table should be created.
|
||||
@retval FALSE Page table should not be created.
|
||||
|
||||
**/
|
||||
BOOLEAN
|
||||
ToBuildPageTable (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
if (!IsIa32PaeSupport ()) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
if (IsNullDetectionEnabled ()) {
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if (PcdGet8 (PcdHeapGuardPropertyMask) != 0) {
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if (PcdGetBool (PcdCpuStackGuard)) {
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if (IsEnableNonExecNeeded ()) {
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/**
|
||||
Transfers control to DxeCore.
|
||||
|
||||
This function performs a CPU architecture specific operations to execute
|
||||
the entry point of DxeCore with the parameters of HobList.
|
||||
|
||||
@param DxeCoreEntryPoint The entry point of DxeCore.
|
||||
@param HobList The start of HobList passed to DxeCore.
|
||||
|
||||
**/
|
||||
VOID
|
||||
HandOffToDxeCore (
|
||||
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
|
||||
IN EFI_PEI_HOB_POINTERS HobList
|
||||
)
|
||||
{
|
||||
EFI_PHYSICAL_ADDRESS BaseOfStack;
|
||||
EFI_PHYSICAL_ADDRESS TopOfStack;
|
||||
UINTN PageTables;
|
||||
X64_IDT_GATE_DESCRIPTOR *IdtTable;
|
||||
UINTN SizeOfTemplate;
|
||||
VOID *TemplateBase;
|
||||
EFI_PHYSICAL_ADDRESS VectorAddress;
|
||||
UINT32 Index;
|
||||
X64_IDT_TABLE *IdtTableForX64;
|
||||
|
||||
// Initialize floating point operating environment to be compliant with UEFI spec.
|
||||
InitializeFloatingPointUnits ();
|
||||
|
||||
//
|
||||
// Mask off all legacy 8259 interrupt sources
|
||||
//
|
||||
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
|
||||
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
|
||||
|
||||
//
|
||||
// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
|
||||
//
|
||||
if (IsNullDetectionEnabled ()) {
|
||||
ClearFirst4KPage (HobList.Raw);
|
||||
BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);
|
||||
}
|
||||
|
||||
BaseOfStack = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
|
||||
ASSERT (BaseOfStack != 0);
|
||||
|
||||
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
|
||||
//
|
||||
// Compute the top of the stack we were allocated, which is used to load X64 dxe core.
|
||||
// Pre-allocate a 32 bytes which confroms to x64 calling convention.
|
||||
//
|
||||
// The first four parameters to a function are passed in rcx, rdx, r8 and r9.
|
||||
// Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the
|
||||
// register parameters is reserved on the stack, in case the called function
|
||||
// wants to spill them; this is important if the function is variadic.
|
||||
//
|
||||
TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - 32;
|
||||
|
||||
//
|
||||
// x64 Calling Conventions requires that the stack must be aligned to 16 bytes
|
||||
//
|
||||
TopOfStack = (EFI_PHYSICAL_ADDRESS)(UINTN)ALIGN_POINTER (TopOfStack, 16);
|
||||
|
||||
//
|
||||
// Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA
|
||||
// memory, it may be corrupted when copying FV to high-end memory
|
||||
//
|
||||
AsmWriteGdtr (&gGdt);
|
||||
//
|
||||
// Create page table and save PageMapLevel4 to CR3
|
||||
//
|
||||
PageTables = CreateIdentityMappingPageTables (BaseOfStack, STACK_SIZE, 0, 0);
|
||||
|
||||
//
|
||||
// Paging might be already enabled. To avoid conflict configuration,
|
||||
// disable paging first anyway.
|
||||
//
|
||||
AsmWriteCr0 (AsmReadCr0 () & (~BIT31));
|
||||
AsmWriteCr3 (PageTables);
|
||||
|
||||
//
|
||||
// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
|
||||
//
|
||||
UpdateStackHob (BaseOfStack, STACK_SIZE);
|
||||
|
||||
SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);
|
||||
|
||||
VectorAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (sizeof (X64_IDT_TABLE) + SizeOfTemplate * IDT_ENTRY_COUNT));
|
||||
ASSERT (VectorAddress != 0);
|
||||
|
||||
//
|
||||
// Store EFI_PEI_SERVICES** in the 4 bytes immediately preceding IDT to avoid that
|
||||
// it may not be gotten correctly after IDT register is re-written.
|
||||
//
|
||||
IdtTableForX64 = (X64_IDT_TABLE *)(UINTN)VectorAddress;
|
||||
IdtTableForX64->PeiService = NULL;
|
||||
|
||||
VectorAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)(IdtTableForX64 + 1);
|
||||
IdtTable = IdtTableForX64->IdtTable;
|
||||
for (Index = 0; Index < IDT_ENTRY_COUNT; Index++) {
|
||||
IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;
|
||||
IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;
|
||||
IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;
|
||||
|
||||
IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16)VectorAddress;
|
||||
IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16)(RShiftU64 (VectorAddress, 16));
|
||||
IdtTable[Index].Offset32To63 = (UINT32)(RShiftU64 (VectorAddress, 32));
|
||||
IdtTable[Index].Reserved = 0;
|
||||
|
||||
CopyMem ((VOID *)(UINTN)VectorAddress, TemplateBase, SizeOfTemplate);
|
||||
AsmVectorFixup ((VOID *)(UINTN)VectorAddress, (UINT8)Index);
|
||||
|
||||
VectorAddress += SizeOfTemplate;
|
||||
}
|
||||
|
||||
gLidtDescriptor.Base = (UINTN)IdtTable;
|
||||
|
||||
AsmWriteIdtr (&gLidtDescriptor);
|
||||
|
||||
DEBUG ((
|
||||
DEBUG_INFO,
|
||||
"%a() Stack Base: 0x%lx, Stack Size: 0x%x\n",
|
||||
__func__,
|
||||
BaseOfStack,
|
||||
STACK_SIZE
|
||||
));
|
||||
|
||||
//
|
||||
// Go to Long Mode and transfer control to DxeCore.
|
||||
// Interrupts will not get turned on until the CPU AP is loaded.
|
||||
// Call x64 drivers passing in single argument, a pointer to the HOBs.
|
||||
//
|
||||
AsmEnablePaging64 (
|
||||
SYS_CODE64_SEL,
|
||||
DxeCoreEntryPoint,
|
||||
(EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw),
|
||||
0,
|
||||
TopOfStack
|
||||
);
|
||||
} else {
|
||||
// 32bit UEFI payload could be supported if required later.
|
||||
DEBUG ((DEBUG_ERROR, "NOT support 32bit UEFI payload\n"));
|
||||
ASSERT (FALSE);
|
||||
CpuDeadLoop ();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
Entry point to the C language phase of UEFI payload.
|
||||
@param[in] BootloaderParameter The starting address of bootloader parameter block.
|
||||
@retval It will not return if SUCCESS, and return error when passing bootloader parameter.
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
_ModuleEntryPoint (
|
||||
IN UINTN BootloaderParameter
|
||||
)
|
||||
{
|
||||
return FitUplEntryPoint (BootloaderParameter);
|
||||
}
|
135
UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFuncFit.c
Normal file
135
UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFuncFit.c
Normal file
@ -0,0 +1,135 @@
|
||||
/** @file
|
||||
x64-specifc functionality for DxeLoad.
|
||||
|
||||
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
**/
|
||||
|
||||
#include <PiPei.h>
|
||||
#include <Library/BaseLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/MemoryAllocationLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
#include <Library/HobLib.h>
|
||||
#include <Library/FdtLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
#include "X64/VirtualMemory.h"
|
||||
#include "UefiPayloadEntry.h"
|
||||
#define STACK_SIZE 0x20000
|
||||
|
||||
extern VOID *mHobList;
|
||||
|
||||
/**
|
||||
Transfers control to DxeCore.
|
||||
|
||||
This function performs a CPU architecture specific operations to execute
|
||||
the entry point of DxeCore with the parameters of HobList.
|
||||
It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
|
||||
|
||||
@param DxeCoreEntryPoint The entry point of DxeCore.
|
||||
@param HobList The start of HobList passed to DxeCore.
|
||||
|
||||
**/
|
||||
VOID
|
||||
HandOffToDxeCore (
|
||||
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
|
||||
IN EFI_PEI_HOB_POINTERS HobList
|
||||
)
|
||||
{
|
||||
VOID *BaseOfStack;
|
||||
VOID *TopOfStack;
|
||||
UINTN PageTables;
|
||||
VOID *GhcbBase;
|
||||
UINTN GhcbSize;
|
||||
|
||||
// Initialize floating point operating environment to be compliant with UEFI spec.
|
||||
InitializeFloatingPointUnits ();
|
||||
|
||||
//
|
||||
// Mask off all legacy 8259 interrupt sources
|
||||
//
|
||||
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
|
||||
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
|
||||
|
||||
//
|
||||
// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
|
||||
//
|
||||
if (IsNullDetectionEnabled ()) {
|
||||
ClearFirst4KPage (HobList.Raw);
|
||||
BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);
|
||||
}
|
||||
|
||||
//
|
||||
// Allocate 128KB for the Stack
|
||||
//
|
||||
BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
|
||||
ASSERT (BaseOfStack != NULL);
|
||||
|
||||
//
|
||||
// Compute the top of the stack we were allocated. Pre-allocate a UINTN
|
||||
// for safety.
|
||||
//
|
||||
TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
|
||||
TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
|
||||
|
||||
//
|
||||
// Get the address and size of the GHCB pages
|
||||
//
|
||||
GhcbBase = 0;
|
||||
GhcbSize = 0;
|
||||
|
||||
PageTables = 0;
|
||||
if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
|
||||
//
|
||||
// Create page table and save PageMapLevel4 to CR3
|
||||
//
|
||||
PageTables = CreateIdentityMappingPageTables (
|
||||
(EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack,
|
||||
STACK_SIZE,
|
||||
(EFI_PHYSICAL_ADDRESS)(UINTN)GhcbBase,
|
||||
GhcbSize
|
||||
);
|
||||
} else {
|
||||
//
|
||||
// Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
|
||||
// for the DxeIpl and the DxeCore are both X64.
|
||||
//
|
||||
ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE);
|
||||
ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);
|
||||
}
|
||||
|
||||
if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
|
||||
AsmWriteCr3 (PageTables);
|
||||
}
|
||||
|
||||
//
|
||||
// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
|
||||
//
|
||||
UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);
|
||||
|
||||
//
|
||||
// Transfer the control to the entry point of DxeCore.
|
||||
//
|
||||
SwitchStack (
|
||||
(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
|
||||
HobList.Raw,
|
||||
NULL,
|
||||
TopOfStack
|
||||
);
|
||||
}
|
||||
|
||||
/**
|
||||
Entry point to the C language phase of UEFI payload.
|
||||
@param[in] BootloaderParameter The starting address of bootloader parameter block.
|
||||
@retval It will not return if SUCCESS, and return error when passing bootloader parameter.
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
_ModuleEntryPoint (
|
||||
IN UINTN BootloaderParameter
|
||||
)
|
||||
{
|
||||
return FitUplEntryPoint (BootloaderParameter);
|
||||
}
|
Loading…
x
Reference in New Issue
Block a user