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ArmPkg/ArmLib: Fix cache-invalidate initial page tables 

Because of a bug, current EL gets passed to DC IVAC instruction instead
of the VA entry that needs to be invalidated.

Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
This commit is contained in:
Ashish Singhal 2020-03-19 10:37:05 -06:00 committed by mergify[bot]
parent 1b6b4a83e1
commit 0c8ea9fe1a
1 changed files with 1 additions and 1 deletions
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2
ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S
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@ -122,7 +122,7 @@ ASM_FUNC(ArmSetMAIR)
ASM_FUNC(ArmUpdateTranslationTableEntry) ASM_FUNC(ArmUpdateTranslationTableEntry)
dsb nshst dsb nshst
lsr x1, x1, #12 lsr x1, x1, #12
EL1_OR_EL2_OR_EL3(x0) EL1_OR_EL2_OR_EL3(x2)
1: tlbi vaae1, x1 // TLB Invalidate VA , EL1 1: tlbi vaae1, x1 // TLB Invalidate VA , EL1
mrs x2, sctlr_el1 mrs x2, sctlr_el1
b 4f b 4f