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	ArmPlatformPkg/HdLcdArmVExpressLib: use write-combine mapping for VRAM
Replace the uncached memory mapping of the framebuffer with a write- combining one. This improves performance, and avoids issues with unaligned accesses and DC ZVA instructions performed by the accelerated memcpy/memset routines. Instead of manipulating the memory attributes directly, use the SetMemorySpaceAttributes() DXE services, which validates the attributes against the capabilities of the region before making the actual change. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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				| @ -18,11 +18,11 @@ | ||||
| #include <Library/IoLib.h> | ||||
| #include <Library/PcdLib.h> | ||||
| #include <Library/DebugLib.h> | ||||
| #include <Library/DxeServicesTableLib.h> | ||||
| #include <Library/LcdPlatformLib.h> | ||||
| #include <Library/MemoryAllocationLib.h> | ||||
| #include <Library/UefiBootServicesTableLib.h> | ||||
| 
 | ||||
| #include <Protocol/Cpu.h> | ||||
| #include <Protocol/EdidDiscovered.h> | ||||
| #include <Protocol/EdidActive.h> | ||||
| 
 | ||||
| @ -119,7 +119,6 @@ LcdPlatformGetVram ( | ||||
|   ) | ||||
| { | ||||
|   EFI_STATUS              Status; | ||||
|   EFI_CPU_ARCH_PROTOCOL  *Cpu; | ||||
|   EFI_ALLOCATE_TYPE       AllocationType; | ||||
| 
 | ||||
|   // Set the vram size
 | ||||
| @ -138,12 +137,9 @@ LcdPlatformGetVram ( | ||||
|     return Status; | ||||
|   } | ||||
| 
 | ||||
|   // Ensure the Cpu architectural protocol is already installed
 | ||||
|   Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu); | ||||
|   ASSERT_EFI_ERROR(Status); | ||||
| 
 | ||||
|   // Mark the VRAM as un-cacheable. The VRAM is inside the DRAM, which is cacheable.
 | ||||
|   Status = Cpu->SetMemoryAttributes (Cpu, *VramBaseAddress, *VramSize, EFI_MEMORY_UC); | ||||
|   // Mark the VRAM as write-combining. The VRAM is inside the DRAM, which is cacheable.
 | ||||
|   Status = gDS->SetMemorySpaceAttributes (*VramBaseAddress, *VramSize, | ||||
|                   EFI_MEMORY_WC); | ||||
|   ASSERT_EFI_ERROR(Status); | ||||
|   if (EFI_ERROR(Status)) { | ||||
|     gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES (*VramSize)); | ||||
|  | ||||
| @ -32,8 +32,9 @@ HdLcdArmVExpress.c | ||||
|   ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec | ||||
| 
 | ||||
| [LibraryClasses] | ||||
|   BaseLib | ||||
|   ArmPlatformSysConfigLib | ||||
|   BaseLib | ||||
|   DxeServicesTableLib | ||||
| 
 | ||||
| [Protocols] | ||||
|   gEfiEdidDiscoveredProtocolGuid                # Produced | ||||
|  | ||||
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