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MdePkg/BaseRngLib: Prefer ArmReadIdAA64Isar0Reg() over ArmReadIdIsar0() 

A ArmReadIdAA64Isar0Reg() function was recently added
to BaseLib. Use it instead of its ArmReadIdIsar0() equivalent,
which was private to the BaseRngLib library.

This also allows to avoid the confusion between the following
registers:
- ID_ISAR0_EL1: allows to probe for Divide instructions, Debug
  instructions, ...
- ID_AA64ISAR0_EL1: AARCH64 specific register allowing to probe
  for AESE, RNDR, ... instructions

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
This commit is contained in:
Pierre Gondois 2023-10-04 14:27:17 +02:00 committed by mergify[bot]
parent 30e53f8b5e
commit 1715d67231
5 changed files with 2 additions and 82 deletions
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30
MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.S
View File

@ -1,30 +0,0 @@
#------------------------------------------------------------------------------
#
# ArmReadIdIsar0() for AArch64
#
# Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#------------------------------------------------------------------------------
.text
.p2align 2
GCC_ASM_EXPORT(ArmReadIdIsar0)
#/**
# Reads the ID_AA64ISAR0 Register.
#
# @return The contents of the ID_AA64ISAR0 register.
#
#**/
#UINT64
#EFIAPI
#ArmReadIdIsar0 (
# VOID
# );
#
ASM_PFX(ArmReadIdIsar0):
AARCH64_BTI(c)
mrs x0, id_aa64isar0_el1 // Read ID_AA64ISAR0 Register
ret

30
MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm
View File

@ -1,30 +0,0 @@
;------------------------------------------------------------------------------
;
; ArmReadIdIsar0() for AArch64
;
; Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
;
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
EXPORT ArmReadIdIsar0
AREA BaseLib_LowLevel, CODE, READONLY
;/**
; Reads the ID_AA64ISAR0 Register.
;
; @return The contents of the ID_AA64ISAR0 register.
;
;**/
;UINT64
;EFIAPI
;ArmReadIdIsar0 (
; VOID
; );
;
ArmReadIdIsar0
mrs x0, id_aa64isar0_el1 // Read ID_AA64ISAR0 Register
ret
END

12
MdePkg/Library/BaseRngLib/AArch64/ArmRng.h
View File

@ -27,16 +27,4 @@ ArmRndr (
OUT UINT64 *Rand
);
/**
Reads the ID_AA64ISAR0 Register.
@return The contents of the ID_AA64ISAR0 register.
**/
UINT64
EFIAPI
ArmReadIdIsar0 (
VOID
);
#endif /* ARM_RNG_H_ */

10
MdePkg/Library/BaseRngLib/AArch64/Rndr.c
View File

@ -21,11 +21,6 @@
STATIC BOOLEAN mRndrSupported;
//
// Bit mask used to determine if RNDR instruction is supported.
//
#define RNDR_MASK ((UINT64)MAX_UINT16 << 60U)
/**
The constructor function checks whether or not RNDR instruction is supported
by the host hardware.
@ -49,9 +44,8 @@ BaseRngLibConstructor (
// Determine RNDR support by examining bits 63:60 of the ISAR0 register returned by
// MSR. A non-zero value indicates that the processor supports the RNDR instruction.
//
Isar0 = ArmReadIdIsar0 ();
mRndrSupported = ((Isar0 & RNDR_MASK) != 0);
Isar0 = ArmReadIdAA64Isar0Reg ();
mRndrSupported = !!((Isar0 >> ARM_ID_AA64ISAR0_EL1_RNDR_SHIFT) & ARM_ID_AA64ISAR0_EL1_RNDR_MASK);
return EFI_SUCCESS;
}

2
MdePkg/Library/BaseRngLib/BaseRngLib.inf
View File

@ -38,10 +38,8 @@
AArch64/Rndr.c
AArch64/ArmRng.h
AArch64/ArmReadIdIsar0.S | GCC
AArch64/ArmRng.S | GCC
AArch64/ArmReadIdIsar0.asm | MSFT
AArch64/ArmRng.asm | MSFT
[Guids.AARCH64]