ArmPkg/ArmGic: Returned the InterruptId in ArmGicAcknowledgeInterrupt()

The InterruptId has a different width for GicV2 and GicV3 (respectively
10bit and 24bit).
The function prototype has been changed to return this value to make the
caller GIC architecture version independent. Otherwise, we would have need
to expose a different mask to allow the caller to retrieve this value from
the read register.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15628 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2014-07-04 14:41:30 +00:00 committed by oliviermartin
parent f5241b5725
commit 1b0ac0dedf
5 changed files with 66 additions and 22 deletions

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@ -14,6 +14,7 @@
#include <Base.h>
#include <Library/ArmGicLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include "GicV2/ArmGicV2Lib.h"
@ -49,13 +50,39 @@ ArmGicSendSgiTo (
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);
}
/*
* Acknowledge and return the value of the Interrupt Acknowledge Register
*
* InterruptId is returned separately from the register value because in
* the GICv2 the register value contains the CpuId and InterruptId while
* in the GICv3 the register value is only the InterruptId.
*
* @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface
* @param InterruptId InterruptId read from the Interrupt Acknowledge Register
*
* @retval value returned by the Interrupt Acknowledge Register
*
*/
UINTN
EFIAPI
ArmGicAcknowledgeInterrupt (
IN UINTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase,
OUT UINTN *InterruptId
)
{
return ArmGicV2AcknowledgeInterrupt (GicInterruptInterfaceBase);
UINTN Value;
Value = ArmGicV2AcknowledgeInterrupt (GicInterruptInterfaceBase);
// InterruptId is required for the caller to know if a valid or spurious
// interrupt has been read
ASSERT (InterruptId != NULL);
if (InterruptId != NULL) {
*InterruptId = Value & ARM_GIC_ICCIAR_ACKINTID;
}
return Value;
}
VOID

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@ -140,10 +140,24 @@ ArmGicSendSgiTo (
IN INTN SgiId
);
/*
* Acknowledge and return the value of the Interrupt Acknowledge Register
*
* InterruptId is returned separately from the register value because in
* the GICv2 the register value contains the CpuId and InterruptId while
* in the GICv3 the register value is only the InterruptId.
*
* @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface
* @param InterruptId InterruptId read from the Interrupt Acknowledge Register
*
* @retval value returned by the Interrupt Acknowledge Register
*
*/
UINTN
EFIAPI
ArmGicAcknowledgeInterrupt (
IN UINTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase,
OUT UINTN *InterruptId
);
VOID

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@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@ -30,24 +30,25 @@ NonSecureWaitForFirmware (
VOID
)
{
VOID (*secondary_start)(VOID);
UINTN Interrupt;
VOID (*SecondaryStart)(VOID);
UINTN AcknowledgeInterrupt;
UINTN InterruptId;
// The secondary cores will execute the firmware once wake from WFI.
secondary_start = (VOID (*)())PcdGet32(PcdFvBaseAddress);
SecondaryStart = (VOID (*)())PcdGet32 (PcdFvBaseAddress);
ArmCallWFI();
ArmCallWFI ();
// Acknowledge the interrupt and send End of Interrupt signal.
Interrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase));
AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);
// Check if it is a valid interrupt ID
if ((Interrupt & ARM_GIC_ICCIAR_ACKINTID) < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {
if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {
// Got a valid SGI number hence signal End of Interrupt
ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), Interrupt);
ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);
}
// Jump to secondary core entry point.
secondary_start ();
SecondaryStart ();
// PEI Core should always load and never return
ASSERT (FALSE);

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@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@ -45,7 +45,8 @@ SecondaryMain (
UINT32 CoreId;
VOID (*SecondaryStart)(VOID);
UINTN SecondaryEntryAddr;
UINTN Interrupt;
UINTN AcknowledgeInterrupt;
UINTN InterruptId;
ClusterId = GET_CLUSTER_ID(MpId);
CoreId = GET_CORE_ID(MpId);
@ -88,11 +89,11 @@ SecondaryMain (
SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);
// Acknowledge the interrupt and send End of Interrupt signal.
Interrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase));
AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);
// Check if it is a valid interrupt ID
if ((Interrupt & ARM_GIC_ICCIAR_ACKINTID) < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {
if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {
// Got a valid SGI number hence signal End of Interrupt
ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), Interrupt);
ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);
}
} while (SecondaryEntryAddr == 0);

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@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@ -55,7 +55,8 @@ SecondaryMain (
UINT32 CoreId;
VOID (*SecondaryStart)(VOID);
UINTN SecondaryEntryAddr;
UINTN Interrupt;
UINTN AcknowledgeInterrupt;
UINTN InterruptId;
ClusterId = GET_CLUSTER_ID(MpId);
CoreId = GET_CORE_ID(MpId);
@ -88,11 +89,11 @@ SecondaryMain (
SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);
// Acknowledge the interrupt and send End of Interrupt signal.
Interrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase));
AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);
// Check if it is a valid interrupt ID
if ((Interrupt & ARM_GIC_ICCIAR_ACKINTID) < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {
if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {
// Got a valid SGI number hence signal End of Interrupt
ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), Interrupt);
ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);
}
} while (SecondaryEntryAddr == 0);