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MdeModulePkg/XhciDxe: Add PCD for the delay of HCRST

Browse Source 
https://bugzilla.tianocore.org/show_bug.cgi?id=4727

Recently some of XHCI host controllers require to have
extra 1ms delay before accessing any MMIO register
during reset. PHY transition from P3 to P0 can take
around 1.3ms and the xHCI reset can take around 1.5ms.
Add PCD to control the delay, the default is 2 ms.

Cc: Ray Ni                   <ray.ni@intel.com>
Cc: Liming Gao               <gaoliming@byosoft.com.cn>
Cc: Krzysztof Lewandowski    <krzysztof.lewandowski@intel.com>
Cc: Jenny Huang              <jenny.huang@intel.com>
Cc: More Shih                <more.shih@intel.com>
Cc: Ian Chiu                 <ian.chiu@intel.com>
Signed-off-by: Xianglei Cai <xianglei.cai@intel.com>
Reviewed-by: Krzysztof Lewandowski <krzysztof.lewandowski@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Xianglei Cai 2024-05-07 09:15:51 +08:00 committed by mergify[bot]
parent c12bbc1490
commit 1c0d4ae2c0
4 changed files with 12 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
View File

@ -28,6 +28,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/DebugLib.h> #include <Library/DebugLib.h>
#include <Library/ReportStatusCodeLib.h> #include <Library/ReportStatusCodeLib.h>
#include <Library/TimerLib.h> #include <Library/TimerLib.h>
#include <Library/PcdLib.h>
#include <IndustryStandard/Pci.h> #include <IndustryStandard/Pci.h>

5
MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
View File

@ -45,6 +45,7 @@
[Packages] [Packages]
MdePkg/MdePkg.dec MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
[LibraryClasses] [LibraryClasses]
MemoryAllocationLib MemoryAllocationLib
@ -56,6 +57,7 @@
DebugLib DebugLib
ReportStatusCodeLib ReportStatusCodeLib
TimerLib TimerLib
PcdLib
[Guids] [Guids]
gEfiEventExitBootServicesGuid ## SOMETIMES_CONSUMES ## Event gEfiEventExitBootServicesGuid ## SOMETIMES_CONSUMES ## Event
@ -64,6 +66,9 @@
gEfiPciIoProtocolGuid ## TO_START gEfiPciIoProtocolGuid ## TO_START
gEfiUsb2HcProtocolGuid ## BY_START gEfiUsb2HcProtocolGuid ## BY_START
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdDelayXhciHCReset ## CONSUMES
# [Event] # [Event]
# EVENT_TYPE_PERIODIC_TIMER ## CONSUMES # EVENT_TYPE_PERIODIC_TIMER ## CONSUMES
# #

2
MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
View File

@ -864,7 +864,7 @@ XhcResetHC (
// Otherwise there may have the timeout case happened. // Otherwise there may have the timeout case happened.
// The below is a workaround to solve such problem. // The below is a workaround to solve such problem.
// //
gBS->Stall (XHC_1_MILLISECOND); gBS->Stall (PcdGet16 (PcdDelayXhciHCReset));
Status = XhcWaitOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET, FALSE, Timeout); Status = XhcWaitOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET, FALSE, Timeout);
if (!EFI_ERROR (Status)) { if (!EFI_ERROR (Status)) {

5
MdeModulePkg/MdeModulePkg.dec
View File

@ -1154,6 +1154,11 @@
# @Prompt Enable large address image loading. # @Prompt Enable large address image loading.
gEfiMdeModulePkgTokenSpaceGuid.PcdImageLargeAddressLoad|TRUE|BOOLEAN|0x30001059 gEfiMdeModulePkgTokenSpaceGuid.PcdImageLargeAddressLoad|TRUE|BOOLEAN|0x30001059
## Indicates time delay for XHCI registers access after it issues HCRST.
# Default is 2000, it represent delay is 2 ms.
# @Prompt Delay access XHCI register after it issues HCRST (us)
gEfiMdeModulePkgTokenSpaceGuid.PcdDelayXhciHCReset|2000|UINT16|0x30001060
[PcdsFixedAtBuild, PcdsPatchableInModule] [PcdsFixedAtBuild, PcdsPatchableInModule]
## Dynamic type PCD can be registered callback function for Pcd setting action. ## Dynamic type PCD can be registered callback function for Pcd setting action.
# PcdMaxPeiPcdCallBackNumberPerPcdEntry indicates the maximum number of callback function # PcdMaxPeiPcdCallBackNumberPerPcdEntry indicates the maximum number of callback function