mirror of https://github.com/acidanthera/audk.git
MdePkg/IoLib: Filter/trace port IO/MMIO access
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3246 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Acked-by: Ard Biesheuvel <ardb@kernel.org>
This commit is contained in:
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38c8be123a
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@ -7,7 +7,7 @@
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# ASSERT(). For ARM, AARCH64 and RISCV64, this I/O library only provides non I/O
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# read and write.
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#
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# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>
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# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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# Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
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@ -66,4 +66,5 @@
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[LibraryClasses]
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DebugLib
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BaseLib
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RegisterFilterLib
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@ -1,7 +1,7 @@
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## @file
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# Instance of I/O Library using KVM/ARM safe assembler routines
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#
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# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>
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# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
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@ -44,3 +44,4 @@
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[LibraryClasses]
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DebugLib
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BaseLib
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RegisterFilterLib
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@ -3,7 +3,7 @@
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This file includes package header files, dependent library classes.
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Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -17,5 +17,6 @@
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#include <Library/IoLib.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/RegisterFilterLib.h>
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#endif
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@ -4,7 +4,7 @@
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# I/O Library that uses compiler intrinsics to perform IN and OUT instructions
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# for IA-32 and x64.
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#
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# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>
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# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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#
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@ -49,4 +49,5 @@
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[LibraryClasses]
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DebugLib
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BaseLib
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RegisterFilterLib
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@ -1,7 +1,7 @@
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/** @file
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Common I/O Library routines.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -82,10 +82,15 @@ MmioRead8 (
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)
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{
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UINT8 Value;
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BOOLEAN Flag;
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Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value);
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if (Flag) {
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MemoryFence ();
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Value = *(volatile UINT8*)Address;
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MemoryFence ();
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}
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FilterAfterMmIoRead (FilterWidth8, Address, &Value);
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return Value;
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}
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@ -112,9 +117,15 @@ MmioWrite8 (
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IN UINT8 Value
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)
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{
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BOOLEAN Flag;
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Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value);
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if (Flag) {
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MemoryFence ();
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*(volatile UINT8*)Address = Value;
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MemoryFence ();
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}
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FilterAfterMmIoWrite (FilterWidth8, Address, &Value);
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return Value;
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}
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@ -141,12 +152,16 @@ MmioRead16 (
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)
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{
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UINT16 Value;
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BOOLEAN Flag;
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ASSERT ((Address & 1) == 0);
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Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value);
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if (Flag) {
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MemoryFence ();
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Value = *(volatile UINT16*)Address;
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MemoryFence ();
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}
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FilterAfterMmIoRead (FilterWidth16, Address, &Value);
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return Value;
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}
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IN UINT16 Value
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)
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{
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BOOLEAN Flag;
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ASSERT ((Address & 1) == 0);
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Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value);
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if (Flag) {
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MemoryFence ();
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*(volatile UINT16*)Address = Value;
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MemoryFence ();
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}
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FilterAfterMmIoWrite (FilterWidth16, Address, &Value);
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return Value;
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}
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@ -205,12 +226,17 @@ MmioRead32 (
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)
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{
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UINT32 Value;
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BOOLEAN Flag;
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ASSERT ((Address & 3) == 0);
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Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value);
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if (Flag) {
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MemoryFence ();
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Value = *(volatile UINT32*)Address;
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MemoryFence ();
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}
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FilterAfterMmIoRead (FilterWidth32, Address, &Value);
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return Value;
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}
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IN UINT32 Value
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)
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{
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BOOLEAN Flag;
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ASSERT ((Address & 3) == 0);
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Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value);
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if (Flag) {
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MemoryFence ();
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*(volatile UINT32*)Address = Value;
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MemoryFence ();
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}
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FilterAfterMmIoWrite (FilterWidth32, Address, &Value);
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return Value;
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}
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)
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{
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UINT64 Value;
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BOOLEAN Flag;
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ASSERT ((Address & 7) == 0);
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Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value);
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if (Flag) {
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MemoryFence ();
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Value = *(volatile UINT64*)Address;
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MemoryFence ();
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}
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FilterAfterMmIoRead (FilterWidth64, Address, &Value);
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return Value;
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}
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IN UINT64 Value
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)
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{
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BOOLEAN Flag;
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ASSERT ((Address & 7) == 0);
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Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value);
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if (Flag) {
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MemoryFence ();
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*(volatile UINT64*)Address = Value;
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MemoryFence ();
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}
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FilterAfterMmIoWrite (FilterWidth64, Address, &Value);
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return Value;
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}
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/** @file
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I/O Library for ARM.
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Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
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Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
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IN UINTN Address
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)
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{
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return MmioRead8Internal (Address);
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UINT8 Value;
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BOOLEAN Flag;
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Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value);
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if (Flag) {
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Value = MmioRead8Internal (Address);
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}
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FilterAfterMmIoRead (FilterWidth8, Address, &Value);
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return Value;
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}
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/**
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IN UINT8 Value
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)
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{
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BOOLEAN Flag;
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Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value);
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if (Flag) {
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MmioWrite8Internal (Address, Value);
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}
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FilterAfterMmIoWrite (FilterWidth8, Address, &Value);
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return Value;
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}
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IN UINTN Address
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)
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{
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BOOLEAN Flag;
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UINT16 Value;
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ASSERT ((Address & 1) == 0);
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return MmioRead16Internal (Address);
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Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value);
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if (Flag) {
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Value = MmioRead16Internal (Address);
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}
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FilterAfterMmIoRead (FilterWidth16, Address, &Value);
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return Value;
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}
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/**
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IN UINT16 Value
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)
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{
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BOOLEAN Flag;
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ASSERT ((Address & 1) == 0);
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Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value);
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if (Flag) {
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MmioWrite16Internal (Address, Value);
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}
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FilterAfterMmIoWrite (FilterWidth16, Address, &Value);
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return Value;
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}
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IN UINTN Address
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)
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{
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BOOLEAN Flag;
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UINT32 Value;
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ASSERT ((Address & 3) == 0);
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return MmioRead32Internal (Address);
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Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value);
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if (Flag) {
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Value = MmioRead32Internal (Address);
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}
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FilterAfterMmIoRead (FilterWidth32, Address, &Value);
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return Value;
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}
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/**
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@ -669,9 +710,16 @@ MmioWrite32 (
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IN UINT32 Value
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)
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{
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BOOLEAN Flag;
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ASSERT ((Address & 3) == 0);
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Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value);
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if (Flag) {
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MmioWrite32Internal (Address, Value);
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}
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FilterAfterMmIoWrite (FilterWidth32, Address, &Value);
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return Value;
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}
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@ -695,9 +743,18 @@ MmioRead64 (
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IN UINTN Address
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)
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{
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BOOLEAN Flag;
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UINT64 Value;
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ASSERT ((Address & 7) == 0);
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return MmioRead64Internal (Address);
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Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value);
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if (Flag) {
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Value = MmioRead64Internal (Address);
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}
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FilterAfterMmIoRead (FilterWidth64, Address, &Value);
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return Value;
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}
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/**
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@ -720,8 +777,15 @@ MmioWrite64 (
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IN UINT64 Value
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)
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{
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BOOLEAN Flag;
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ASSERT ((Address & 7) == 0);
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Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value);
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if (Flag) {
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MmioWrite64Internal (Address, Value);
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}
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FilterAfterMmIoWrite (FilterWidth64, Address, &Value);
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return Value;
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}
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@ -10,7 +10,7 @@
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We don't advocate putting compiler specifics in libraries or drivers but there
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is no other way to make this work.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -39,8 +39,14 @@ IoRead8 (
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)
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{
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UINT8 Data;
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BOOLEAN Flag;
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Flag = FilterBeforeIoRead (FilterWidth8, Port, &Data);
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if (Flag) {
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__asm__ __volatile__ ("inb %w1,%b0" : "=a" (Data) : "d" ((UINT16)Port));
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}
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FilterAfterIoRead (FilterWidth8, Port, &Data);
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return Data;
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}
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IN UINT8 Value
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)
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{
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BOOLEAN Flag;
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Flag = FilterBeforeIoWrite (FilterWidth8, Port, &Value);
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if (Flag) {
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__asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port));
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}
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FilterAfterIoWrite (FilterWidth8, Port, &Value);
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return Value;;
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}
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@ -92,9 +105,16 @@ IoRead16 (
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)
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{
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UINT16 Data;
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BOOLEAN Flag;
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ASSERT ((Port & 1) == 0);
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Flag = FilterBeforeIoRead (FilterWidth16, Port, &Data);
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if (Flag) {
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__asm__ __volatile__ ("inw %w1,%w0" : "=a" (Data) : "d" ((UINT16)Port));
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}
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FilterAfterIoRead (FilterWidth16, Port, &Data);
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return Data;
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}
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@ -121,8 +141,17 @@ IoWrite16 (
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IN UINT16 Value
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)
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{
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BOOLEAN Flag;
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ASSERT ((Port & 1) == 0);
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Flag = FilterBeforeIoWrite (FilterWidth16, Port, &Value);
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if (Flag) {
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__asm__ __volatile__ ("outw %w0,%w1" : : "a" (Value), "d" ((UINT16)Port));
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}
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FilterAfterIoWrite (FilterWidth16, Port, &Value);
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return Value;;
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}
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|
@ -148,9 +177,16 @@ IoRead32 (
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)
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{
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UINT32 Data;
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BOOLEAN Flag;
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ASSERT ((Port & 3) == 0);
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Flag = FilterBeforeIoRead (FilterWidth32, Port, &Data);
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if (Flag) {
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__asm__ __volatile__ ("inl %w1,%0" : "=a" (Data) : "d" ((UINT16)Port));
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}
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FilterAfterIoRead (FilterWidth32, Port, &Data);
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return Data;
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}
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|
@ -177,8 +213,16 @@ IoWrite32 (
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IN UINT32 Value
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)
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{
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BOOLEAN Flag;
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ASSERT ((Port & 3) == 0);
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Flag = FilterBeforeIoWrite (FilterWidth32, Port, &Value);
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if (Flag) {
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__asm__ __volatile__ ("outl %0,%w1" : : "a" (Value), "d" ((UINT16)Port));
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}
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FilterAfterIoWrite (FilterWidth32, Port, &Value);
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return Value;
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}
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|
|
|
@ -8,7 +8,7 @@
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We don't advocate putting compiler specifics in libraries or drivers but there
|
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is no other way to make this work.
|
||||
|
||||
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
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|
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**/
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|
@ -66,10 +66,16 @@ IoRead8 (
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)
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{
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UINT8 Value;
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BOOLEAN Flag;
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Flag = FilterBeforeIoRead (FilterWidth8, Port, &Value);
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if (Flag) {
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_ReadWriteBarrier ();
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Value = (UINT8)_inp ((UINT16)Port);
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_ReadWriteBarrier ();
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}
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FilterAfterIoRead (FilterWidth8, Port, &Value);
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return Value;
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}
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|
@ -95,9 +101,16 @@ IoWrite8 (
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IN UINT8 Value
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)
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{
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BOOLEAN Flag;
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Flag = FilterBeforeIoWrite(FilterWidth8, Port, &Value);
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if (Flag) {
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_ReadWriteBarrier ();
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(UINT8)_outp ((UINT16)Port, Value);
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_ReadWriteBarrier ();
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}
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FilterAfterIoWrite (FilterWidth8, Port, &Value);
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return Value;
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}
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|
@ -123,11 +136,18 @@ IoRead16 (
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)
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{
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UINT16 Value;
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BOOLEAN Flag;
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ASSERT ((Port & 1) == 0);
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Flag = FilterBeforeIoRead (FilterWidth16, Port, &Value);
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if (Flag) {
|
||||
_ReadWriteBarrier ();
|
||||
Value = _inpw ((UINT16)Port);
|
||||
_ReadWriteBarrier ();
|
||||
}
|
||||
FilterBeforeIoRead (FilterWidth16, Port, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
@ -154,10 +174,18 @@ IoWrite16 (
|
|||
IN UINT16 Value
|
||||
)
|
||||
{
|
||||
BOOLEAN Flag;
|
||||
|
||||
ASSERT ((Port & 1) == 0);
|
||||
|
||||
Flag = FilterBeforeIoWrite(FilterWidth16, Port, &Value);
|
||||
if (Flag) {
|
||||
_ReadWriteBarrier ();
|
||||
_outpw ((UINT16)Port, Value);
|
||||
_ReadWriteBarrier ();
|
||||
}
|
||||
FilterAfterIoWrite (FilterWidth16, Port, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
@ -183,11 +211,18 @@ IoRead32 (
|
|||
)
|
||||
{
|
||||
UINT32 Value;
|
||||
BOOLEAN Flag;
|
||||
|
||||
ASSERT ((Port & 3) == 0);
|
||||
|
||||
Flag = FilterBeforeIoRead(FilterWidth32, Port, &Value);
|
||||
if (Flag) {
|
||||
_ReadWriteBarrier ();
|
||||
Value = _inpd ((UINT16)Port);
|
||||
_ReadWriteBarrier ();
|
||||
}
|
||||
FilterAfterIoRead (FilterWidth32, Port, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
@ -214,9 +249,17 @@ IoWrite32 (
|
|||
IN UINT32 Value
|
||||
)
|
||||
{
|
||||
BOOLEAN Flag;
|
||||
|
||||
ASSERT ((Port & 3) == 0);
|
||||
|
||||
Flag = FilterBeforeIoWrite(FilterWidth32, Port, &Value);
|
||||
if (Flag) {
|
||||
_ReadWriteBarrier ();
|
||||
_outpd ((UINT16)Port, Value);
|
||||
_ReadWriteBarrier ();
|
||||
}
|
||||
FilterAfterIoWrite (FilterWidth32, Port, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
I/O library for non I/O read and write access (memory map I/O read and
|
||||
write only) architecture, such as ARM and RISC-V processor.
|
||||
|
||||
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
|
||||
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
|
||||
Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
|
||||
|
@ -408,8 +408,14 @@ MmioRead8 (
|
|||
)
|
||||
{
|
||||
UINT8 Value;
|
||||
BOOLEAN Flag;
|
||||
|
||||
Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value);
|
||||
if (Flag) {
|
||||
Value = *(volatile UINT8*)Address;
|
||||
}
|
||||
FilterAfterMmIoRead (FilterWidth8, Address, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
@ -433,7 +439,14 @@ MmioWrite8 (
|
|||
IN UINT8 Value
|
||||
)
|
||||
{
|
||||
BOOLEAN Flag;
|
||||
|
||||
Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value);
|
||||
if (Flag) {
|
||||
*(volatile UINT8*)Address = Value;
|
||||
}
|
||||
FilterAfterMmIoWrite (FilterWidth8, Address, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
@ -458,9 +471,16 @@ MmioRead16 (
|
|||
)
|
||||
{
|
||||
UINT16 Value;
|
||||
BOOLEAN Flag;
|
||||
|
||||
ASSERT ((Address & 1) == 0);
|
||||
|
||||
Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value);
|
||||
if (Flag) {
|
||||
Value = *(volatile UINT16*)Address;
|
||||
}
|
||||
FilterAfterMmIoRead (FilterWidth16, Address, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
@ -484,8 +504,16 @@ MmioWrite16 (
|
|||
IN UINT16 Value
|
||||
)
|
||||
{
|
||||
BOOLEAN Flag;
|
||||
|
||||
ASSERT ((Address & 1) == 0);
|
||||
|
||||
Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value);
|
||||
if (Flag) {
|
||||
*(volatile UINT16*)Address = Value;
|
||||
}
|
||||
FilterAfterMmIoWrite (FilterWidth16, Address, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
@ -510,9 +538,16 @@ MmioRead32 (
|
|||
)
|
||||
{
|
||||
UINT32 Value;
|
||||
BOOLEAN Flag;
|
||||
|
||||
ASSERT ((Address & 3) == 0);
|
||||
|
||||
Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value);
|
||||
if (Flag) {
|
||||
Value = *(volatile UINT32*)Address;
|
||||
}
|
||||
FilterAfterMmIoRead (FilterWidth32, Address, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
@ -536,8 +571,16 @@ MmioWrite32 (
|
|||
IN UINT32 Value
|
||||
)
|
||||
{
|
||||
BOOLEAN Flag;
|
||||
|
||||
ASSERT ((Address & 3) == 0);
|
||||
|
||||
Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value);
|
||||
if (Flag) {
|
||||
*(volatile UINT32*)Address = Value;
|
||||
}
|
||||
FilterAfterMmIoWrite (FilterWidth32, Address, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
@ -562,9 +605,16 @@ MmioRead64 (
|
|||
)
|
||||
{
|
||||
UINT64 Value;
|
||||
BOOLEAN Flag;
|
||||
|
||||
ASSERT ((Address & 7) == 0);
|
||||
|
||||
Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value);
|
||||
if (Flag) {
|
||||
Value = *(volatile UINT64*)Address;
|
||||
}
|
||||
FilterAfterMmIoRead (FilterWidth64, Address, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
@ -588,8 +638,16 @@ MmioWrite64 (
|
|||
IN UINT64 Value
|
||||
)
|
||||
{
|
||||
BOOLEAN Flag;
|
||||
|
||||
ASSERT ((Address & 7) == 0);
|
||||
|
||||
Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value);
|
||||
if (Flag) {
|
||||
*(volatile UINT64*)Address = Value;
|
||||
}
|
||||
FilterAfterMmIoWrite (FilterWidth64, Address, &Value);
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue