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Clean DuetPkg for ICC build.

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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6836 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
xli24 2008-12-04 06:56:35 +00:00
parent 9e21d6d026
commit 3a0a147375
4 changed files with 10 additions and 10 deletions
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8
DuetPkg/DxeIpl/X64/Paging.c
View File

@ -196,10 +196,10 @@ Description:
VOID *PageNumberBase; VOID *PageNumberBase;
SizeOfMemorySpace -= EFI_2M_PAGE_BITS_NUM; SizeOfMemorySpace -= EFI_2M_PAGE_BITS_NUM;
gPDEBitsNum = MIN (SizeOfMemorySpace, EFI_MAX_ENTRY_BITS_NUM); gPDEBitsNum = (UINT8) MIN (SizeOfMemorySpace, EFI_MAX_ENTRY_BITS_NUM);
SizeOfMemorySpace = SizeOfMemorySpace - gPDEBitsNum; SizeOfMemorySpace = (UINT8) (SizeOfMemorySpace - gPDEBitsNum);
gPDPTEBitsNum = MIN (SizeOfMemorySpace, EFI_MAX_ENTRY_BITS_NUM); gPDPTEBitsNum = (UINT8) MIN (SizeOfMemorySpace, EFI_MAX_ENTRY_BITS_NUM);
SizeOfMemorySpace = SizeOfMemorySpace - gPDPTEBitsNum; SizeOfMemorySpace = (UINT8) (SizeOfMemorySpace - gPDPTEBitsNum);
gPML4BitsNum = SizeOfMemorySpace; gPML4BitsNum = SizeOfMemorySpace;
if (gPML4BitsNum > EFI_MAX_ENTRY_BITS_NUM) { if (gPML4BitsNum > EFI_MAX_ENTRY_BITS_NUM) {
return NULL; return NULL;

2
DuetPkg/KbcResetDxe/Reset.c
View File

@ -26,7 +26,7 @@ KbcResetSystem (
IN EFI_RESET_TYPE ResetType, IN EFI_RESET_TYPE ResetType,
IN EFI_STATUS ResetStatus, IN EFI_STATUS ResetStatus,
IN UINTN DataSize, IN UINTN DataSize,
IN CHAR16 *ResetData OPTIONAL IN VOID *ResetData OPTIONAL
) )
/*++ /*++

2
DuetPkg/KbcResetDxe/Reset.h
View File

@ -60,7 +60,7 @@ KbcResetSystem (
IN EFI_RESET_TYPE ResetType, IN EFI_RESET_TYPE ResetType,
IN EFI_STATUS ResetStatus, IN EFI_STATUS ResetStatus,
IN UINTN DataSize, IN UINTN DataSize,
IN CHAR16 *ResetData OPTIONAL IN VOID *ResetData OPTIONAL
) )
/*++ /*++

8
DuetPkg/PciRootBridgeNoEnumerationDxe/X64/PcatIo.c
View File

@ -475,7 +475,7 @@ CheckForRom (
Status = gBS->AllocatePool( Status = gBS->AllocatePool(
EfiBootServicesData, EfiBootServicesData,
((UINT32)mPciOptionRomTable.PciOptionRomCount + 1) * sizeof(EFI_PCI_OPTION_ROM_DESCRIPTOR), ((UINT32)mPciOptionRomTable.PciOptionRomCount + 1) * sizeof(EFI_PCI_OPTION_ROM_DESCRIPTOR),
&TempPciOptionRomDescriptors (VOID **) &TempPciOptionRomDescriptors
); );
if (mPciOptionRomTable.PciOptionRomCount > 0) { if (mPciOptionRomTable.PciOptionRomCount > 0) {
CopyMem( CopyMem(
@ -553,7 +553,7 @@ SaveCommandRegister (
// //
// Clear the memory enable bit // Clear the memory enable bit
// //
Command = Context->CommandRegisterBuffer[Index] & (~0x02); Command = (UINT16) (Context->CommandRegisterBuffer[Index] & (~0x02));
IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address, 1, &Command); IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address, 1, &Command);
} }
@ -606,7 +606,7 @@ ScanPciRootBridgeForRoms(
mPciOptionRomTableInstalled = TRUE; mPciOptionRomTableInstalled = TRUE;
} }
Status = IoDev->Configuration(IoDev, &Descriptors); Status = IoDev->Configuration(IoDev, (VOID **) &Descriptors);
if (EFI_ERROR (Status) || Descriptors == NULL) { if (EFI_ERROR (Status) || Descriptors == NULL) {
return EFI_NOT_FOUND; return EFI_NOT_FOUND;
} }
@ -677,7 +677,7 @@ ScanPciRootBridgeForRoms(
Status = gBS->AllocatePool( Status = gBS->AllocatePool(
EfiBootServicesData, EfiBootServicesData,
sizeof(UINT16) * (MaxBus - MinBus + 1) * (PCI_MAX_DEVICE+1) * (PCI_MAX_FUNC+1), sizeof(UINT16) * (MaxBus - MinBus + 1) * (PCI_MAX_DEVICE+1) * (PCI_MAX_FUNC+1),
&Context.CommandRegisterBuffer (VOID **) &Context.CommandRegisterBuffer
); );
if (EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {