Change function IpfFlushCacheRange() to AsmFlushCacheRange() follow the Mde_Lib_Spec.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6835 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
gikidy 2008-12-04 06:56:34 +00:00
parent cc39b88baa
commit 9e21d6d026
3 changed files with 14 additions and 13 deletions

View File

@ -3694,7 +3694,7 @@ CpuDeadLoop (
-1 is invalidated. This function may choose to invalidate the entire
instruction cache if that is more efficient than invalidating the specified
range. If Length is 0, the no instruction cache lines are invalidated.
Address is returned.
Address is returned. This function is only available on IPF.
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
@ -3710,7 +3710,7 @@ CpuDeadLoop (
**/
VOID *
EFIAPI
IpfFlushCacheRange (
AsmFlushCacheRange (
IN VOID *Address,
IN UINTN Length
);
@ -3722,7 +3722,7 @@ IpfFlushCacheRange (
The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
An implementation may flush a larger region. This function is only available on IPF.
@param Address The Address of cache line to be flushed.
@param Address The Address of cache line to be flushed.
@return The address of FC instruction executed.
@ -3740,7 +3740,7 @@ AsmFc (
The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
An implementation may flush a larger region. This function is only available on IPF.
@param Address The Address of cache line to be flushed.
@param Address The Address of cache line to be flushed.
@return The address of FC.I instruction executed.
@ -3761,7 +3761,7 @@ AsmFci (
must either guarantee that Index is valid, or the caller must set up fault handlers to
catch the faults. This function is only available on IPF.
@param Index The 8-bit Processor Identifier Register index to read.
@param Index The 8-bit Processor Identifier Register index to read.
@return The current value of Processor Identifier Register specified by Index.

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@ -71,7 +71,7 @@ InvalidateInstructionCacheRange (
IN UINTN Length
)
{
return IpfFlushCacheRange (Address, Length);
return AsmFlushCacheRange (Address, Length);
}
/**
@ -128,7 +128,7 @@ WriteBackInvalidateDataCacheRange (
{
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
return IpfFlushCacheRange (Address, Length);
return AsmFlushCacheRange (Address, Length);
}
/**
@ -184,7 +184,7 @@ WriteBackDataCacheRange (
{
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
return IpfFlushCacheRange (Address, Length);
return AsmFlushCacheRange (Address, Length);
}
/**
@ -241,5 +241,5 @@ InvalidateDataCacheRange (
IN UINTN Length
)
{
return IpfFlushCacheRange (Address, Length);
return AsmFlushCacheRange (Address, Length);
}

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@ -31,7 +31,8 @@
// containing Address + Length -1 is invalidated. This function may choose to
// invalidate the entire instruction cache if that is more efficient than
// invalidating the specified range. If Length is 0, the no instruction cache
// lines are invalidated. Address is returned.
// lines are invalidated. Address is returned.
// This function is only available on IPF.
//
// If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
//
@ -46,12 +47,12 @@
//
// VOID *
// EFIAPI
// IpfFlushCacheRange (
// AsmFlushCacheRange (
// IN VOID *Address,
// IN UINTN Length
// );
//
PROCEDURE_ENTRY (IpfFlushCacheRange)
PROCEDURE_ENTRY (AsmFlushCacheRange)
NESTED_SETUP (5,8,0,0)
@ -90,5 +91,5 @@ DoneFlushingC:
mov r8 = in0 // return *Address
NESTED_RETURN
PROCEDURE_EXIT (IpfFlushCacheRange)
PROCEDURE_EXIT (AsmFlushCacheRange)