Original MTRR lib hardcode VARIABLE_MTRR as 8. But it is 7 in Core2 if SMRR enabled, and 10 in latest Corei7.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9935 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jyao1 2010-02-05 06:33:42 +00:00
parent 1b2bf3cadc
commit 3b9be4164b
3 changed files with 156 additions and 43 deletions

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@ -1,7 +1,7 @@
/** @file /** @file
CPU DXE Module. CPU DXE Module.
Copyright (c) 2008 - 2009, Intel Corporation Copyright (c) 2008 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -852,8 +852,12 @@ RefreshGcdMemoryAttributes (
UINTN NumberOfDescriptors; UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap; EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
UINT64 DefaultAttributes; UINT64 DefaultAttributes;
VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR]; VARIABLE_MTRR VariableMtrr[MAX_MTRR_NUMBER_OF_VARIABLE_MTRR];
MTRR_FIXED_SETTINGS MtrrFixedSettings; MTRR_FIXED_SETTINGS MtrrFixedSettings;
UINT32 FirmwareVariableMtrrCount;
UINT32 UsedMtrr;
FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
// mIsFlushingGCD = TRUE; // mIsFlushingGCD = TRUE;
mIsFlushingGCD = FALSE; mIsFlushingGCD = FALSE;
@ -867,9 +871,11 @@ RefreshGcdMemoryAttributes (
// //
// Get the memory attribute of variable MTRRs // Get the memory attribute of variable MTRRs
// //
UsedMtrr = MAX_MTRR_NUMBER_OF_VARIABLE_MTRR;
MtrrGetMemoryAttributeInVariableMtrr ( MtrrGetMemoryAttributeInVariableMtrr (
mValidMtrrBitsMask, mValidMtrrBitsMask,
mValidMtrrAddressMask, mValidMtrrAddressMask,
&UsedMtrr,
VariableMtrr VariableMtrr
); );
@ -902,7 +908,7 @@ RefreshGcdMemoryAttributes (
// //
// Go for variable MTRRs with WB attribute // Go for variable MTRRs with WB attribute
// //
for (Index = 0; Index < FIRMWARE_VARIABLE_MTRR_NUMBER; Index++) { for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
if (VariableMtrr[Index].Valid && if (VariableMtrr[Index].Valid &&
VariableMtrr[Index].Type == MTRR_CACHE_WRITE_BACK) { VariableMtrr[Index].Type == MTRR_CACHE_WRITE_BACK) {
SetGcdMemorySpaceAttributes ( SetGcdMemorySpaceAttributes (
@ -917,7 +923,7 @@ RefreshGcdMemoryAttributes (
// //
// Go for variable MTRRs with Non-WB attribute // Go for variable MTRRs with Non-WB attribute
// //
for (Index = 0; Index < FIRMWARE_VARIABLE_MTRR_NUMBER; Index++) { for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
if (VariableMtrr[Index].Valid && if (VariableMtrr[Index].Valid &&
VariableMtrr[Index].Type != MTRR_CACHE_WRITE_BACK) { VariableMtrr[Index].Type != MTRR_CACHE_WRITE_BACK) {
Attributes = GetMemorySpaceAttributeFromMtrrType ((UINT8) VariableMtrr[Index].Type); Attributes = GetMemorySpaceAttributeFromMtrrType ((UINT8) VariableMtrr[Index].Type);

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@ -19,9 +19,19 @@
// According to IA32 SDM, MTRRs number and msr offset are always consistent // According to IA32 SDM, MTRRs number and msr offset are always consistent
// for IA32 processor family // for IA32 processor family
// //
#define MTRR_NUMBER_OF_VARIABLE_MTRR 8
//
// We can not use Pcd as macro to define structure, so we have to define MAX_MTRR_NUMBER_OF_VARIABLE_MTRR
//
#define MAX_MTRR_NUMBER_OF_VARIABLE_MTRR 32
//
// Firmware need reserve 2 MTRR for OS
//
#define RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER 2
#define MTRR_NUMBER_OF_FIXED_MTRR 11 #define MTRR_NUMBER_OF_FIXED_MTRR 11
#define FIRMWARE_VARIABLE_MTRR_NUMBER 6 #define MTRR_LIB_IA32_MTRR_CAP 0x0FE
#define MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK 0x0FF
#define MTRR_LIB_IA32_MTRR_FIX64K_00000 0x250 #define MTRR_LIB_IA32_MTRR_FIX64K_00000 0x250
#define MTRR_LIB_IA32_MTRR_FIX16K_80000 0x258 #define MTRR_LIB_IA32_MTRR_FIX16K_80000 0x258
#define MTRR_LIB_IA32_MTRR_FIX16K_A0000 0x259 #define MTRR_LIB_IA32_MTRR_FIX16K_A0000 0x259
@ -34,7 +44,6 @@
#define MTRR_LIB_IA32_MTRR_FIX4K_F0000 0x26E #define MTRR_LIB_IA32_MTRR_FIX4K_F0000 0x26E
#define MTRR_LIB_IA32_MTRR_FIX4K_F8000 0x26F #define MTRR_LIB_IA32_MTRR_FIX4K_F8000 0x26F
#define MTRR_LIB_IA32_VARIABLE_MTRR_BASE 0x200 #define MTRR_LIB_IA32_VARIABLE_MTRR_BASE 0x200
#define MTRR_LIB_IA32_VARIABLE_MTRR_END 0x20F
#define MTRR_LIB_IA32_MTRR_DEF_TYPE 0x2FF #define MTRR_LIB_IA32_MTRR_DEF_TYPE 0x2FF
#define MTRR_LIB_MSR_VALID_MASK 0xFFFFFFFFFULL #define MTRR_LIB_MSR_VALID_MASK 0xFFFFFFFFFULL
#define MTRR_LIB_CACHE_VALID_ADDRESS 0xFFFFFF000ULL #define MTRR_LIB_CACHE_VALID_ADDRESS 0xFFFFFF000ULL
@ -74,7 +83,7 @@ typedef struct _MTRR_VARIABLE_SETTING_ {
// Array for variable MTRRs // Array for variable MTRRs
// //
typedef struct _MTRR_VARIABLE_SETTINGS_ { typedef struct _MTRR_VARIABLE_SETTINGS_ {
MTRR_VARIABLE_SETTING Mtrr[MTRR_NUMBER_OF_VARIABLE_MTRR]; MTRR_VARIABLE_SETTING Mtrr[MAX_MTRR_NUMBER_OF_VARIABLE_MTRR];
} MTRR_VARIABLE_SETTINGS; } MTRR_VARIABLE_SETTINGS;
// //
@ -111,6 +120,28 @@ typedef enum {
#define MTRR_CACHE_WRITE_BACK 6 #define MTRR_CACHE_WRITE_BACK 6
#define MTRR_CACHE_INVALID_TYPE 7 #define MTRR_CACHE_INVALID_TYPE 7
/**
Returns the variable MTRR count for the CPU.
@return Variable MTRR count
**/
UINT32
GetVariableMtrrCount (
VOID
);
/**
Returns the firmware usable variable MTRR count for the CPU.
@return Firmware usable variable MTRR count
**/
UINT32
GetFirmwareVariableMtrrCount (
VOID
);
/** /**
This function attempts to set the attributes for a memory range. This function attempts to set the attributes for a memory range.
@ -251,19 +282,25 @@ MtrrSetAllMtrrs (
This function shadows the content of variable MTRRs into This function shadows the content of variable MTRRs into
an internal array: VariableMtrr an internal array: VariableMtrr
@param MtrrValidBitsMask The mask for the valid bit of the MTRR @param MtrrValidBitsMask The mask for the valid bit of the MTRR
@param MtrrValidAddressMask The valid address mask for MTRR since the base address in @param MtrrValidAddressMask The valid address mask for MTRR since the base address in
MTRR must align to 4K, so valid address mask equal to MTRR must align to 4K, so valid address mask equal to
MtrrValidBitsMask & 0xfffffffffffff000ULL MtrrValidBitsMask & 0xfffffffffffff000ULL
@param VariableMtrr The array to shadow variable MTRRs content @param VariableMtrrCount On input, it means the array number of variable MTRRs passed in.
@return The ruturn value of this paramter indicates the number of On output, it means the number of MTRRs which has been used if EFI_SUCCESS,
MTRRs which has been used. or the number of MTRR required if BUFFER_TOO_SMALL.
@param VariableMtrr The array to shadow variable MTRRs content
@retval RETURN_SUCCESS The variable MTRRs are returned.
@retval RETURN_BUFFER_TOO_SMALL The input buffer is too small to hold the variable MTRRs.
**/ **/
UINT32 RETURN_STATUS
EFIAPI EFIAPI
MtrrGetMemoryAttributeInVariableMtrr ( MtrrGetMemoryAttributeInVariableMtrr (
IN UINT64 MtrrValidBitsMask, IN UINT64 MtrrValidBitsMask,
IN UINT64 MtrrValidAddressMask, IN UINT64 MtrrValidAddressMask,
IN OUT UINT32 *VariableMtrrCount,
OUT VARIABLE_MTRR *VariableMtrr OUT VARIABLE_MTRR *VariableMtrr
); );

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@ -1,7 +1,7 @@
/** @file /** @file
MTRR setting library MTRR setting library
Copyright (c) 2008 - 2009, Intel Corporation Copyright (c) 2008 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -82,6 +82,33 @@ FIXED_MTRR MtrrLibFixedMtrrTable[] = {
}, },
}; };
/**
Returns the variable MTRR count for the CPU.
@return Variable MTRR count
**/
UINT32
GetVariableMtrrCount (
VOID
)
{
return (UINT32)(AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP) & MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK);
}
/**
Returns the firmware usable variable MTRR count for the CPU.
@return Firmware usable variable MTRR count
**/
UINT32
GetFirmwareVariableMtrrCount (
VOID
)
{
return GetVariableMtrrCount () - RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER;
}
/** /**
Returns the default MTRR cache type for the system. Returns the default MTRR cache type for the system.
@ -273,36 +300,55 @@ ProgramFixedMtrr (
/** /**
Get the attribute of variable MTRRs. Get the attribute of variable MTRRs.
This function shadows the content of variable MTRRs into an This function shadows the content of variable MTRRs into
internal array: VariableMtrr. an internal array: VariableMtrr
@param MtrrValidBitsMask The mask for the valid bit of the MTRR @param MtrrValidBitsMask The mask for the valid bit of the MTRR
@param MtrrValidAddressMask The valid address mask for MTRR @param MtrrValidAddressMask The valid address mask for MTRR since the base address in
@param VariableMtrr The array to shadow variable MTRRs content MTRR must align to 4K, so valid address mask equal to
MtrrValidBitsMask & 0xfffffffffffff000ULL
@param VariableMtrrCount On input, it means the array number of variable MTRRs passed in.
On output, it means the number of MTRRs which has been used if EFI_SUCCESS,
or the number of MTRR required if BUFFER_TOO_SMALL.
@param VariableMtrr The array to shadow variable MTRRs content
@return The return value of this paramter indicates the @retval RETURN_SUCCESS The variable MTRRs are returned.
number of MTRRs which has been used. @retval RETURN_BUFFER_TOO_SMALL The input buffer is too small to hold the variable MTRRs.
**/ **/
UINT32 RETURN_STATUS
EFIAPI EFIAPI
MtrrGetMemoryAttributeInVariableMtrr ( MtrrGetMemoryAttributeInVariableMtrr (
IN UINT64 MtrrValidBitsMask, IN UINT64 MtrrValidBitsMask,
IN UINT64 MtrrValidAddressMask, IN UINT64 MtrrValidAddressMask,
IN OUT UINT32 *VariableMtrrCount,
OUT VARIABLE_MTRR *VariableMtrr OUT VARIABLE_MTRR *VariableMtrr
) )
{ {
UINTN Index; UINTN Index;
UINT32 MsrNum; UINT32 MsrNum;
UINT32 UsedMtrr; UINT32 UsedMtrr;
UINTN FirmwareVariableMtrrCount;
UINT32 VariableMtrrEnd;
ZeroMem (VariableMtrr, sizeof (VARIABLE_MTRR) * MTRR_NUMBER_OF_VARIABLE_MTRR); //
// Check if input buffer is large enough
//
FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
if (*VariableMtrrCount < FirmwareVariableMtrrCount) {
*VariableMtrrCount = (UINT32)FirmwareVariableMtrrCount;
return RETURN_BUFFER_TOO_SMALL;
}
VariableMtrrEnd = MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (2 * GetVariableMtrrCount ()) - 1;
ZeroMem (VariableMtrr, sizeof (VARIABLE_MTRR) * (*VariableMtrrCount));
UsedMtrr = 0; UsedMtrr = 0;
for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE, Index = 0; for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE, Index = 0;
( (
(MsrNum < MTRR_LIB_IA32_VARIABLE_MTRR_END) && (MsrNum < VariableMtrrEnd) &&
(Index < FIRMWARE_VARIABLE_MTRR_NUMBER) (Index < FirmwareVariableMtrrCount)
); );
MsrNum += 2 MsrNum += 2
) { ) {
@ -322,7 +368,8 @@ MtrrGetMemoryAttributeInVariableMtrr (
Index++; Index++;
} }
} }
return UsedMtrr; *VariableMtrrCount = UsedMtrr;
return RETURN_SUCCESS;
} }
@ -415,11 +462,14 @@ CombineMemoryAttribute (
UINT64 CombineEnd; UINT64 CombineEnd;
UINT64 MtrrEnd; UINT64 MtrrEnd;
UINT64 EndAddress; UINT64 EndAddress;
UINT32 FirmwareVariableMtrrCount;
FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
*OverwriteExistingMtrr = FALSE; *OverwriteExistingMtrr = FALSE;
EndAddress = *Base +*Length - 1; EndAddress = *Base +*Length - 1;
for (Index = 0; Index < FIRMWARE_VARIABLE_MTRR_NUMBER; Index++) { for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
MtrrEnd = VariableMtrr[Index].BaseAddress + VariableMtrr[Index].Length - 1; MtrrEnd = VariableMtrr[Index].BaseAddress + VariableMtrr[Index].Length - 1;
if ( if (
@ -586,10 +636,12 @@ InvalidateMtrr (
{ {
UINTN Index; UINTN Index;
UINTN Cr4; UINTN Cr4;
UINTN VariableMtrrCount;
Cr4 = PreMtrrChange (); Cr4 = PreMtrrChange ();
Index = 0; Index = 0;
while (Index < MTRR_NUMBER_OF_VARIABLE_MTRR) { VariableMtrrCount = GetVariableMtrrCount ();
while (Index < VariableMtrrCount) {
if (VariableMtrr[Index].Valid == FALSE && VariableMtrr[Index].Used == TRUE ) { if (VariableMtrr[Index].Valid == FALSE && VariableMtrr[Index].Used == TRUE ) {
AsmWriteMsr64 (VariableMtrr[Index].Msr, 0); AsmWriteMsr64 (VariableMtrr[Index].Msr, 0);
AsmWriteMsr64 (VariableMtrr[Index].Msr + 1, 0); AsmWriteMsr64 (VariableMtrr[Index].Msr + 1, 0);
@ -830,12 +882,17 @@ MtrrSetMemoryAttribute (
BOOLEAN Positive; BOOLEAN Positive;
UINT32 MsrNum; UINT32 MsrNum;
UINTN MtrrNumber; UINTN MtrrNumber;
VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR]; VARIABLE_MTRR VariableMtrr[MAX_MTRR_NUMBER_OF_VARIABLE_MTRR];
UINT32 UsedMtrr; UINT32 UsedMtrr;
UINT64 MtrrValidBitsMask; UINT64 MtrrValidBitsMask;
UINT64 MtrrValidAddressMask; UINT64 MtrrValidAddressMask;
UINTN Cr4; UINTN Cr4;
BOOLEAN OverwriteExistingMtrr; BOOLEAN OverwriteExistingMtrr;
UINT32 FirmwareVariableMtrrCount;
UINT32 VariableMtrrEnd;
FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
VariableMtrrEnd = MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (2 * GetVariableMtrrCount ()) - 1;
MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask); MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask);
@ -903,7 +960,8 @@ MtrrSetMemoryAttribute (
// //
// Check for overlap // Check for overlap
// //
UsedMtrr = MtrrGetMemoryAttributeInVariableMtrr (MtrrValidBitsMask, MtrrValidAddressMask, VariableMtrr); UsedMtrr = MAX_MTRR_NUMBER_OF_VARIABLE_MTRR;
MtrrGetMemoryAttributeInVariableMtrr (MtrrValidBitsMask, MtrrValidAddressMask, &UsedMtrr, VariableMtrr);
OverLap = CheckMemoryAttributeOverlap (BaseAddress, BaseAddress + Length - 1, VariableMtrr); OverLap = CheckMemoryAttributeOverlap (BaseAddress, BaseAddress + Length - 1, VariableMtrr);
if (OverLap) { if (OverLap) {
Status = CombineMemoryAttribute (MemoryType, &BaseAddress, &Length, VariableMtrr, &UsedMtrr, &OverwriteExistingMtrr); Status = CombineMemoryAttribute (MemoryType, &BaseAddress, &Length, VariableMtrr, &UsedMtrr, &OverwriteExistingMtrr);
@ -925,7 +983,7 @@ MtrrSetMemoryAttribute (
// //
// Avoid hardcode here and read data dynamically // Avoid hardcode here and read data dynamically
// //
if (UsedMtrr >= FIRMWARE_VARIABLE_MTRR_NUMBER) { if (UsedMtrr >= FirmwareVariableMtrrCount) {
Status = RETURN_OUT_OF_RESOURCES; Status = RETURN_OUT_OF_RESOURCES;
goto Done; goto Done;
} }
@ -955,7 +1013,7 @@ MtrrSetMemoryAttribute (
// Find first unused MTRR // Find first unused MTRR
// //
for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE; for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE;
MsrNum < MTRR_LIB_IA32_VARIABLE_MTRR_END; MsrNum < VariableMtrrEnd;
MsrNum += 2 MsrNum += 2
) { ) {
if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) { if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
@ -974,7 +1032,7 @@ MtrrSetMemoryAttribute (
Positive = GetDirection (TempQword, &MtrrNumber); Positive = GetDirection (TempQword, &MtrrNumber);
if ((UsedMtrr + MtrrNumber) > FIRMWARE_VARIABLE_MTRR_NUMBER) { if ((UsedMtrr + MtrrNumber) > FirmwareVariableMtrrCount) {
Status = RETURN_OUT_OF_RESOURCES; Status = RETURN_OUT_OF_RESOURCES;
goto Done; goto Done;
} }
@ -988,7 +1046,7 @@ MtrrSetMemoryAttribute (
// Find first unused MTRR // Find first unused MTRR
// //
for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE; for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE;
MsrNum < MTRR_LIB_IA32_VARIABLE_MTRR_END; MsrNum < VariableMtrrEnd;
MsrNum += 2 MsrNum += 2
) { ) {
if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) { if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
@ -1014,7 +1072,7 @@ MtrrSetMemoryAttribute (
// //
// Find unused MTRR // Find unused MTRR
// //
for (; MsrNum < MTRR_LIB_IA32_VARIABLE_MTRR_END; MsrNum += 2) { for (; MsrNum < VariableMtrrEnd; MsrNum += 2) {
if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) { if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
break; break;
} }
@ -1069,9 +1127,11 @@ MtrrGetMemoryAttribute (
UINT64 MtrrType; UINT64 MtrrType;
UINT64 TempMtrrType; UINT64 TempMtrrType;
MTRR_MEMORY_CACHE_TYPE CacheType; MTRR_MEMORY_CACHE_TYPE CacheType;
VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR]; VARIABLE_MTRR VariableMtrr[MAX_MTRR_NUMBER_OF_VARIABLE_MTRR];
UINT64 MtrrValidBitsMask; UINT64 MtrrValidBitsMask;
UINT64 MtrrValidAddressMask; UINT64 MtrrValidAddressMask;
UINTN VariableMtrrCount;
UINT32 UsedMtrr;
// //
// Check if MTRR is enabled, if not, return UC as attribute // Check if MTRR is enabled, if not, return UC as attribute
@ -1109,16 +1169,19 @@ MtrrGetMemoryAttribute (
} }
} }
MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask); MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask);
UsedMtrr = MAX_MTRR_NUMBER_OF_VARIABLE_MTRR;
MtrrGetMemoryAttributeInVariableMtrr( MtrrGetMemoryAttributeInVariableMtrr(
MtrrValidBitsMask, MtrrValidBitsMask,
MtrrValidAddressMask, MtrrValidAddressMask,
&UsedMtrr,
VariableMtrr VariableMtrr
); );
// //
// Go through the variable MTRR // Go through the variable MTRR
// //
for (Index = 0; Index < MTRR_NUMBER_OF_VARIABLE_MTRR; Index++) { VariableMtrrCount = GetVariableMtrrCount ();
for (Index = 0; Index < VariableMtrrCount; Index++) {
if (VariableMtrr[Index].Valid) { if (VariableMtrr[Index].Valid) {
if (Address >= VariableMtrr[Index].BaseAddress && if (Address >= VariableMtrr[Index].BaseAddress &&
Address < VariableMtrr[Index].BaseAddress+VariableMtrr[Index].Length) { Address < VariableMtrr[Index].BaseAddress+VariableMtrr[Index].Length) {
@ -1148,8 +1211,10 @@ MtrrGetVariableMtrr (
) )
{ {
UINT32 Index; UINT32 Index;
UINT32 VariableMtrrCount;
for (Index = 0; Index < MTRR_NUMBER_OF_VARIABLE_MTRR; Index++) { VariableMtrrCount = GetVariableMtrrCount ();
for (Index = 0; Index < VariableMtrrCount; Index++) {
VariableSettings->Mtrr[Index].Base = VariableSettings->Mtrr[Index].Base =
AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1)); AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1));
VariableSettings->Mtrr[Index].Mask = VariableSettings->Mtrr[Index].Mask =
@ -1172,8 +1237,10 @@ MtrrSetVariableMtrrWorker (
) )
{ {
UINT32 Index; UINT32 Index;
UINT32 VariableMtrrCount;
for (Index = 0; Index < MTRR_NUMBER_OF_VARIABLE_MTRR; Index++) { VariableMtrrCount = GetVariableMtrrCount ();
for (Index = 0; Index < VariableMtrrCount; Index++) {
AsmWriteMsr64 ( AsmWriteMsr64 (
MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1), MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1),
VariableSettings->Mtrr[Index].Base VariableSettings->Mtrr[Index].Base
@ -1362,6 +1429,7 @@ MtrrDebugPrintAllMtrrs (
{ {
MTRR_SETTINGS MtrrSettings; MTRR_SETTINGS MtrrSettings;
UINTN Index; UINTN Index;
UINTN VariableMtrrCount;
MtrrGetAllMtrrs (&MtrrSettings); MtrrGetAllMtrrs (&MtrrSettings);
DEBUG((EFI_D_ERROR, "DefaultType = %016lx\n", MtrrSettings.MtrrDefType)); DEBUG((EFI_D_ERROR, "DefaultType = %016lx\n", MtrrSettings.MtrrDefType));
@ -1372,7 +1440,9 @@ MtrrDebugPrintAllMtrrs (
MtrrSettings.Fixed.Mtrr[Index] MtrrSettings.Fixed.Mtrr[Index]
)); ));
} }
for (Index = 0; Index < MTRR_NUMBER_OF_VARIABLE_MTRR; Index++) {
VariableMtrrCount = GetVariableMtrrCount ();
for (Index = 0; Index < VariableMtrrCount; Index++) {
DEBUG(( DEBUG((
EFI_D_ERROR, "Variable[%02d] = %016lx, %016lx\n", EFI_D_ERROR, "Variable[%02d] = %016lx, %016lx\n",
Index, Index,