mirror of https://github.com/acidanthera/audk.git
Original MTRR lib hardcode VARIABLE_MTRR as 8. But it is 7 in Core2 if SMRR enabled, and 10 in latest Corei7.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9935 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
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3b9be4164b
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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CPU DXE Module.
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CPU DXE Module.
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Copyright (c) 2008 - 2009, Intel Corporation
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Copyright (c) 2008 - 2010, Intel Corporation
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All rights reserved. This program and the accompanying materials
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -852,8 +852,12 @@ RefreshGcdMemoryAttributes (
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UINTN NumberOfDescriptors;
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UINTN NumberOfDescriptors;
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EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
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EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
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UINT64 DefaultAttributes;
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UINT64 DefaultAttributes;
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VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
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VARIABLE_MTRR VariableMtrr[MAX_MTRR_NUMBER_OF_VARIABLE_MTRR];
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MTRR_FIXED_SETTINGS MtrrFixedSettings;
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MTRR_FIXED_SETTINGS MtrrFixedSettings;
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UINT32 FirmwareVariableMtrrCount;
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UINT32 UsedMtrr;
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FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
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// mIsFlushingGCD = TRUE;
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// mIsFlushingGCD = TRUE;
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mIsFlushingGCD = FALSE;
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mIsFlushingGCD = FALSE;
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@ -867,9 +871,11 @@ RefreshGcdMemoryAttributes (
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//
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//
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// Get the memory attribute of variable MTRRs
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// Get the memory attribute of variable MTRRs
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//
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//
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UsedMtrr = MAX_MTRR_NUMBER_OF_VARIABLE_MTRR;
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MtrrGetMemoryAttributeInVariableMtrr (
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MtrrGetMemoryAttributeInVariableMtrr (
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mValidMtrrBitsMask,
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mValidMtrrBitsMask,
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mValidMtrrAddressMask,
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mValidMtrrAddressMask,
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&UsedMtrr,
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VariableMtrr
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VariableMtrr
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);
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);
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@ -902,7 +908,7 @@ RefreshGcdMemoryAttributes (
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//
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//
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// Go for variable MTRRs with WB attribute
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// Go for variable MTRRs with WB attribute
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//
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//
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for (Index = 0; Index < FIRMWARE_VARIABLE_MTRR_NUMBER; Index++) {
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for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
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if (VariableMtrr[Index].Valid &&
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if (VariableMtrr[Index].Valid &&
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VariableMtrr[Index].Type == MTRR_CACHE_WRITE_BACK) {
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VariableMtrr[Index].Type == MTRR_CACHE_WRITE_BACK) {
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SetGcdMemorySpaceAttributes (
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SetGcdMemorySpaceAttributes (
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@ -917,7 +923,7 @@ RefreshGcdMemoryAttributes (
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//
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//
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// Go for variable MTRRs with Non-WB attribute
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// Go for variable MTRRs with Non-WB attribute
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//
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//
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for (Index = 0; Index < FIRMWARE_VARIABLE_MTRR_NUMBER; Index++) {
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for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
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if (VariableMtrr[Index].Valid &&
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if (VariableMtrr[Index].Valid &&
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VariableMtrr[Index].Type != MTRR_CACHE_WRITE_BACK) {
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VariableMtrr[Index].Type != MTRR_CACHE_WRITE_BACK) {
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Attributes = GetMemorySpaceAttributeFromMtrrType ((UINT8) VariableMtrr[Index].Type);
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Attributes = GetMemorySpaceAttributeFromMtrrType ((UINT8) VariableMtrr[Index].Type);
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@ -19,9 +19,19 @@
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// According to IA32 SDM, MTRRs number and msr offset are always consistent
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// According to IA32 SDM, MTRRs number and msr offset are always consistent
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// for IA32 processor family
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// for IA32 processor family
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//
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//
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#define MTRR_NUMBER_OF_VARIABLE_MTRR 8
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//
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// We can not use Pcd as macro to define structure, so we have to define MAX_MTRR_NUMBER_OF_VARIABLE_MTRR
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//
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#define MAX_MTRR_NUMBER_OF_VARIABLE_MTRR 32
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//
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// Firmware need reserve 2 MTRR for OS
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//
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#define RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER 2
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#define MTRR_NUMBER_OF_FIXED_MTRR 11
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#define MTRR_NUMBER_OF_FIXED_MTRR 11
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#define FIRMWARE_VARIABLE_MTRR_NUMBER 6
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#define MTRR_LIB_IA32_MTRR_CAP 0x0FE
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#define MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK 0x0FF
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#define MTRR_LIB_IA32_MTRR_FIX64K_00000 0x250
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#define MTRR_LIB_IA32_MTRR_FIX64K_00000 0x250
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#define MTRR_LIB_IA32_MTRR_FIX16K_80000 0x258
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#define MTRR_LIB_IA32_MTRR_FIX16K_80000 0x258
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#define MTRR_LIB_IA32_MTRR_FIX16K_A0000 0x259
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#define MTRR_LIB_IA32_MTRR_FIX16K_A0000 0x259
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@ -34,7 +44,6 @@
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#define MTRR_LIB_IA32_MTRR_FIX4K_F0000 0x26E
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#define MTRR_LIB_IA32_MTRR_FIX4K_F0000 0x26E
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#define MTRR_LIB_IA32_MTRR_FIX4K_F8000 0x26F
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#define MTRR_LIB_IA32_MTRR_FIX4K_F8000 0x26F
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#define MTRR_LIB_IA32_VARIABLE_MTRR_BASE 0x200
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#define MTRR_LIB_IA32_VARIABLE_MTRR_BASE 0x200
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#define MTRR_LIB_IA32_VARIABLE_MTRR_END 0x20F
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#define MTRR_LIB_IA32_MTRR_DEF_TYPE 0x2FF
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#define MTRR_LIB_IA32_MTRR_DEF_TYPE 0x2FF
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#define MTRR_LIB_MSR_VALID_MASK 0xFFFFFFFFFULL
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#define MTRR_LIB_MSR_VALID_MASK 0xFFFFFFFFFULL
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#define MTRR_LIB_CACHE_VALID_ADDRESS 0xFFFFFF000ULL
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#define MTRR_LIB_CACHE_VALID_ADDRESS 0xFFFFFF000ULL
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@ -74,7 +83,7 @@ typedef struct _MTRR_VARIABLE_SETTING_ {
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// Array for variable MTRRs
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// Array for variable MTRRs
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//
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//
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typedef struct _MTRR_VARIABLE_SETTINGS_ {
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typedef struct _MTRR_VARIABLE_SETTINGS_ {
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MTRR_VARIABLE_SETTING Mtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
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MTRR_VARIABLE_SETTING Mtrr[MAX_MTRR_NUMBER_OF_VARIABLE_MTRR];
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} MTRR_VARIABLE_SETTINGS;
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} MTRR_VARIABLE_SETTINGS;
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//
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//
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@ -111,6 +120,28 @@ typedef enum {
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#define MTRR_CACHE_WRITE_BACK 6
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#define MTRR_CACHE_WRITE_BACK 6
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#define MTRR_CACHE_INVALID_TYPE 7
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#define MTRR_CACHE_INVALID_TYPE 7
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/**
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Returns the variable MTRR count for the CPU.
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@return Variable MTRR count
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**/
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UINT32
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GetVariableMtrrCount (
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VOID
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);
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/**
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Returns the firmware usable variable MTRR count for the CPU.
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@return Firmware usable variable MTRR count
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**/
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UINT32
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GetFirmwareVariableMtrrCount (
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VOID
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);
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/**
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/**
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This function attempts to set the attributes for a memory range.
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This function attempts to set the attributes for a memory range.
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@ -251,19 +282,25 @@ MtrrSetAllMtrrs (
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This function shadows the content of variable MTRRs into
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This function shadows the content of variable MTRRs into
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an internal array: VariableMtrr
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an internal array: VariableMtrr
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@param MtrrValidBitsMask The mask for the valid bit of the MTRR
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@param MtrrValidBitsMask The mask for the valid bit of the MTRR
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@param MtrrValidAddressMask The valid address mask for MTRR since the base address in
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@param MtrrValidAddressMask The valid address mask for MTRR since the base address in
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MTRR must align to 4K, so valid address mask equal to
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MTRR must align to 4K, so valid address mask equal to
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MtrrValidBitsMask & 0xfffffffffffff000ULL
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MtrrValidBitsMask & 0xfffffffffffff000ULL
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@param VariableMtrr The array to shadow variable MTRRs content
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@param VariableMtrrCount On input, it means the array number of variable MTRRs passed in.
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@return The ruturn value of this paramter indicates the number of
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On output, it means the number of MTRRs which has been used if EFI_SUCCESS,
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MTRRs which has been used.
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or the number of MTRR required if BUFFER_TOO_SMALL.
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@param VariableMtrr The array to shadow variable MTRRs content
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@retval RETURN_SUCCESS The variable MTRRs are returned.
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@retval RETURN_BUFFER_TOO_SMALL The input buffer is too small to hold the variable MTRRs.
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**/
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**/
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UINT32
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RETURN_STATUS
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EFIAPI
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EFIAPI
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MtrrGetMemoryAttributeInVariableMtrr (
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MtrrGetMemoryAttributeInVariableMtrr (
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IN UINT64 MtrrValidBitsMask,
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IN UINT64 MtrrValidBitsMask,
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IN UINT64 MtrrValidAddressMask,
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IN UINT64 MtrrValidAddressMask,
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IN OUT UINT32 *VariableMtrrCount,
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OUT VARIABLE_MTRR *VariableMtrr
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OUT VARIABLE_MTRR *VariableMtrr
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);
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);
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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MTRR setting library
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MTRR setting library
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Copyright (c) 2008 - 2009, Intel Corporation
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Copyright (c) 2008 - 2010, Intel Corporation
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All rights reserved. This program and the accompanying materials
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -82,6 +82,33 @@ FIXED_MTRR MtrrLibFixedMtrrTable[] = {
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},
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},
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};
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};
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/**
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Returns the variable MTRR count for the CPU.
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@return Variable MTRR count
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**/
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UINT32
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GetVariableMtrrCount (
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VOID
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)
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{
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return (UINT32)(AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP) & MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK);
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}
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/**
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Returns the firmware usable variable MTRR count for the CPU.
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@return Firmware usable variable MTRR count
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**/
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UINT32
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GetFirmwareVariableMtrrCount (
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VOID
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)
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{
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return GetVariableMtrrCount () - RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER;
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}
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/**
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/**
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Returns the default MTRR cache type for the system.
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Returns the default MTRR cache type for the system.
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@ -273,36 +300,55 @@ ProgramFixedMtrr (
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/**
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/**
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Get the attribute of variable MTRRs.
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Get the attribute of variable MTRRs.
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This function shadows the content of variable MTRRs into an
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This function shadows the content of variable MTRRs into
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internal array: VariableMtrr.
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an internal array: VariableMtrr
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@param MtrrValidBitsMask The mask for the valid bit of the MTRR
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@param MtrrValidBitsMask The mask for the valid bit of the MTRR
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@param MtrrValidAddressMask The valid address mask for MTRR
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@param MtrrValidAddressMask The valid address mask for MTRR since the base address in
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@param VariableMtrr The array to shadow variable MTRRs content
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MTRR must align to 4K, so valid address mask equal to
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MtrrValidBitsMask & 0xfffffffffffff000ULL
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@param VariableMtrrCount On input, it means the array number of variable MTRRs passed in.
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On output, it means the number of MTRRs which has been used if EFI_SUCCESS,
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or the number of MTRR required if BUFFER_TOO_SMALL.
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@param VariableMtrr The array to shadow variable MTRRs content
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@return The return value of this paramter indicates the
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@retval RETURN_SUCCESS The variable MTRRs are returned.
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number of MTRRs which has been used.
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@retval RETURN_BUFFER_TOO_SMALL The input buffer is too small to hold the variable MTRRs.
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**/
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**/
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UINT32
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RETURN_STATUS
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EFIAPI
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EFIAPI
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MtrrGetMemoryAttributeInVariableMtrr (
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MtrrGetMemoryAttributeInVariableMtrr (
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IN UINT64 MtrrValidBitsMask,
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IN UINT64 MtrrValidBitsMask,
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IN UINT64 MtrrValidAddressMask,
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IN UINT64 MtrrValidAddressMask,
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IN OUT UINT32 *VariableMtrrCount,
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OUT VARIABLE_MTRR *VariableMtrr
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OUT VARIABLE_MTRR *VariableMtrr
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)
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)
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{
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{
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UINTN Index;
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UINTN Index;
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UINT32 MsrNum;
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UINT32 MsrNum;
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UINT32 UsedMtrr;
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UINT32 UsedMtrr;
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UINTN FirmwareVariableMtrrCount;
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UINT32 VariableMtrrEnd;
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ZeroMem (VariableMtrr, sizeof (VARIABLE_MTRR) * MTRR_NUMBER_OF_VARIABLE_MTRR);
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//
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// Check if input buffer is large enough
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//
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FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
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if (*VariableMtrrCount < FirmwareVariableMtrrCount) {
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*VariableMtrrCount = (UINT32)FirmwareVariableMtrrCount;
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return RETURN_BUFFER_TOO_SMALL;
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}
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VariableMtrrEnd = MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (2 * GetVariableMtrrCount ()) - 1;
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|
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ZeroMem (VariableMtrr, sizeof (VARIABLE_MTRR) * (*VariableMtrrCount));
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UsedMtrr = 0;
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UsedMtrr = 0;
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|
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for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE, Index = 0;
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for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE, Index = 0;
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(
|
(
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(MsrNum < MTRR_LIB_IA32_VARIABLE_MTRR_END) &&
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(MsrNum < VariableMtrrEnd) &&
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(Index < FIRMWARE_VARIABLE_MTRR_NUMBER)
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(Index < FirmwareVariableMtrrCount)
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);
|
);
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MsrNum += 2
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MsrNum += 2
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) {
|
) {
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@ -322,7 +368,8 @@ MtrrGetMemoryAttributeInVariableMtrr (
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Index++;
|
Index++;
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}
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}
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}
|
}
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return UsedMtrr;
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*VariableMtrrCount = UsedMtrr;
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return RETURN_SUCCESS;
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}
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}
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|
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|
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@ -415,11 +462,14 @@ CombineMemoryAttribute (
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UINT64 CombineEnd;
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UINT64 CombineEnd;
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UINT64 MtrrEnd;
|
UINT64 MtrrEnd;
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UINT64 EndAddress;
|
UINT64 EndAddress;
|
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|
UINT32 FirmwareVariableMtrrCount;
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|
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|
FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
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|
|
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*OverwriteExistingMtrr = FALSE;
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*OverwriteExistingMtrr = FALSE;
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EndAddress = *Base +*Length - 1;
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EndAddress = *Base +*Length - 1;
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|
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for (Index = 0; Index < FIRMWARE_VARIABLE_MTRR_NUMBER; Index++) {
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for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
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|
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MtrrEnd = VariableMtrr[Index].BaseAddress + VariableMtrr[Index].Length - 1;
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MtrrEnd = VariableMtrr[Index].BaseAddress + VariableMtrr[Index].Length - 1;
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if (
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if (
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@ -586,10 +636,12 @@ InvalidateMtrr (
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{
|
{
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UINTN Index;
|
UINTN Index;
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UINTN Cr4;
|
UINTN Cr4;
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|
UINTN VariableMtrrCount;
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|
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Cr4 = PreMtrrChange ();
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Cr4 = PreMtrrChange ();
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Index = 0;
|
Index = 0;
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while (Index < MTRR_NUMBER_OF_VARIABLE_MTRR) {
|
VariableMtrrCount = GetVariableMtrrCount ();
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|
while (Index < VariableMtrrCount) {
|
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if (VariableMtrr[Index].Valid == FALSE && VariableMtrr[Index].Used == TRUE ) {
|
if (VariableMtrr[Index].Valid == FALSE && VariableMtrr[Index].Used == TRUE ) {
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AsmWriteMsr64 (VariableMtrr[Index].Msr, 0);
|
AsmWriteMsr64 (VariableMtrr[Index].Msr, 0);
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AsmWriteMsr64 (VariableMtrr[Index].Msr + 1, 0);
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AsmWriteMsr64 (VariableMtrr[Index].Msr + 1, 0);
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|
@ -830,12 +882,17 @@ MtrrSetMemoryAttribute (
|
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BOOLEAN Positive;
|
BOOLEAN Positive;
|
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UINT32 MsrNum;
|
UINT32 MsrNum;
|
||||||
UINTN MtrrNumber;
|
UINTN MtrrNumber;
|
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VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
|
VARIABLE_MTRR VariableMtrr[MAX_MTRR_NUMBER_OF_VARIABLE_MTRR];
|
||||||
UINT32 UsedMtrr;
|
UINT32 UsedMtrr;
|
||||||
UINT64 MtrrValidBitsMask;
|
UINT64 MtrrValidBitsMask;
|
||||||
UINT64 MtrrValidAddressMask;
|
UINT64 MtrrValidAddressMask;
|
||||||
UINTN Cr4;
|
UINTN Cr4;
|
||||||
BOOLEAN OverwriteExistingMtrr;
|
BOOLEAN OverwriteExistingMtrr;
|
||||||
|
UINT32 FirmwareVariableMtrrCount;
|
||||||
|
UINT32 VariableMtrrEnd;
|
||||||
|
|
||||||
|
FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
|
||||||
|
VariableMtrrEnd = MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (2 * GetVariableMtrrCount ()) - 1;
|
||||||
|
|
||||||
MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask);
|
MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask);
|
||||||
|
|
||||||
|
@ -903,7 +960,8 @@ MtrrSetMemoryAttribute (
|
||||||
//
|
//
|
||||||
// Check for overlap
|
// Check for overlap
|
||||||
//
|
//
|
||||||
UsedMtrr = MtrrGetMemoryAttributeInVariableMtrr (MtrrValidBitsMask, MtrrValidAddressMask, VariableMtrr);
|
UsedMtrr = MAX_MTRR_NUMBER_OF_VARIABLE_MTRR;
|
||||||
|
MtrrGetMemoryAttributeInVariableMtrr (MtrrValidBitsMask, MtrrValidAddressMask, &UsedMtrr, VariableMtrr);
|
||||||
OverLap = CheckMemoryAttributeOverlap (BaseAddress, BaseAddress + Length - 1, VariableMtrr);
|
OverLap = CheckMemoryAttributeOverlap (BaseAddress, BaseAddress + Length - 1, VariableMtrr);
|
||||||
if (OverLap) {
|
if (OverLap) {
|
||||||
Status = CombineMemoryAttribute (MemoryType, &BaseAddress, &Length, VariableMtrr, &UsedMtrr, &OverwriteExistingMtrr);
|
Status = CombineMemoryAttribute (MemoryType, &BaseAddress, &Length, VariableMtrr, &UsedMtrr, &OverwriteExistingMtrr);
|
||||||
|
@ -925,7 +983,7 @@ MtrrSetMemoryAttribute (
|
||||||
//
|
//
|
||||||
// Avoid hardcode here and read data dynamically
|
// Avoid hardcode here and read data dynamically
|
||||||
//
|
//
|
||||||
if (UsedMtrr >= FIRMWARE_VARIABLE_MTRR_NUMBER) {
|
if (UsedMtrr >= FirmwareVariableMtrrCount) {
|
||||||
Status = RETURN_OUT_OF_RESOURCES;
|
Status = RETURN_OUT_OF_RESOURCES;
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
@ -955,7 +1013,7 @@ MtrrSetMemoryAttribute (
|
||||||
// Find first unused MTRR
|
// Find first unused MTRR
|
||||||
//
|
//
|
||||||
for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE;
|
for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE;
|
||||||
MsrNum < MTRR_LIB_IA32_VARIABLE_MTRR_END;
|
MsrNum < VariableMtrrEnd;
|
||||||
MsrNum += 2
|
MsrNum += 2
|
||||||
) {
|
) {
|
||||||
if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
|
if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
|
||||||
|
@ -974,7 +1032,7 @@ MtrrSetMemoryAttribute (
|
||||||
|
|
||||||
Positive = GetDirection (TempQword, &MtrrNumber);
|
Positive = GetDirection (TempQword, &MtrrNumber);
|
||||||
|
|
||||||
if ((UsedMtrr + MtrrNumber) > FIRMWARE_VARIABLE_MTRR_NUMBER) {
|
if ((UsedMtrr + MtrrNumber) > FirmwareVariableMtrrCount) {
|
||||||
Status = RETURN_OUT_OF_RESOURCES;
|
Status = RETURN_OUT_OF_RESOURCES;
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
@ -988,7 +1046,7 @@ MtrrSetMemoryAttribute (
|
||||||
// Find first unused MTRR
|
// Find first unused MTRR
|
||||||
//
|
//
|
||||||
for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE;
|
for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE;
|
||||||
MsrNum < MTRR_LIB_IA32_VARIABLE_MTRR_END;
|
MsrNum < VariableMtrrEnd;
|
||||||
MsrNum += 2
|
MsrNum += 2
|
||||||
) {
|
) {
|
||||||
if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
|
if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
|
||||||
|
@ -1014,7 +1072,7 @@ MtrrSetMemoryAttribute (
|
||||||
//
|
//
|
||||||
// Find unused MTRR
|
// Find unused MTRR
|
||||||
//
|
//
|
||||||
for (; MsrNum < MTRR_LIB_IA32_VARIABLE_MTRR_END; MsrNum += 2) {
|
for (; MsrNum < VariableMtrrEnd; MsrNum += 2) {
|
||||||
if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
|
if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -1069,9 +1127,11 @@ MtrrGetMemoryAttribute (
|
||||||
UINT64 MtrrType;
|
UINT64 MtrrType;
|
||||||
UINT64 TempMtrrType;
|
UINT64 TempMtrrType;
|
||||||
MTRR_MEMORY_CACHE_TYPE CacheType;
|
MTRR_MEMORY_CACHE_TYPE CacheType;
|
||||||
VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
|
VARIABLE_MTRR VariableMtrr[MAX_MTRR_NUMBER_OF_VARIABLE_MTRR];
|
||||||
UINT64 MtrrValidBitsMask;
|
UINT64 MtrrValidBitsMask;
|
||||||
UINT64 MtrrValidAddressMask;
|
UINT64 MtrrValidAddressMask;
|
||||||
|
UINTN VariableMtrrCount;
|
||||||
|
UINT32 UsedMtrr;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Check if MTRR is enabled, if not, return UC as attribute
|
// Check if MTRR is enabled, if not, return UC as attribute
|
||||||
|
@ -1109,16 +1169,19 @@ MtrrGetMemoryAttribute (
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask);
|
MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask);
|
||||||
|
UsedMtrr = MAX_MTRR_NUMBER_OF_VARIABLE_MTRR;
|
||||||
MtrrGetMemoryAttributeInVariableMtrr(
|
MtrrGetMemoryAttributeInVariableMtrr(
|
||||||
MtrrValidBitsMask,
|
MtrrValidBitsMask,
|
||||||
MtrrValidAddressMask,
|
MtrrValidAddressMask,
|
||||||
|
&UsedMtrr,
|
||||||
VariableMtrr
|
VariableMtrr
|
||||||
);
|
);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Go through the variable MTRR
|
// Go through the variable MTRR
|
||||||
//
|
//
|
||||||
for (Index = 0; Index < MTRR_NUMBER_OF_VARIABLE_MTRR; Index++) {
|
VariableMtrrCount = GetVariableMtrrCount ();
|
||||||
|
for (Index = 0; Index < VariableMtrrCount; Index++) {
|
||||||
if (VariableMtrr[Index].Valid) {
|
if (VariableMtrr[Index].Valid) {
|
||||||
if (Address >= VariableMtrr[Index].BaseAddress &&
|
if (Address >= VariableMtrr[Index].BaseAddress &&
|
||||||
Address < VariableMtrr[Index].BaseAddress+VariableMtrr[Index].Length) {
|
Address < VariableMtrr[Index].BaseAddress+VariableMtrr[Index].Length) {
|
||||||
|
@ -1148,8 +1211,10 @@ MtrrGetVariableMtrr (
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
UINT32 Index;
|
UINT32 Index;
|
||||||
|
UINT32 VariableMtrrCount;
|
||||||
|
|
||||||
for (Index = 0; Index < MTRR_NUMBER_OF_VARIABLE_MTRR; Index++) {
|
VariableMtrrCount = GetVariableMtrrCount ();
|
||||||
|
for (Index = 0; Index < VariableMtrrCount; Index++) {
|
||||||
VariableSettings->Mtrr[Index].Base =
|
VariableSettings->Mtrr[Index].Base =
|
||||||
AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1));
|
AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1));
|
||||||
VariableSettings->Mtrr[Index].Mask =
|
VariableSettings->Mtrr[Index].Mask =
|
||||||
|
@ -1172,8 +1237,10 @@ MtrrSetVariableMtrrWorker (
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
UINT32 Index;
|
UINT32 Index;
|
||||||
|
UINT32 VariableMtrrCount;
|
||||||
|
|
||||||
for (Index = 0; Index < MTRR_NUMBER_OF_VARIABLE_MTRR; Index++) {
|
VariableMtrrCount = GetVariableMtrrCount ();
|
||||||
|
for (Index = 0; Index < VariableMtrrCount; Index++) {
|
||||||
AsmWriteMsr64 (
|
AsmWriteMsr64 (
|
||||||
MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1),
|
MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1),
|
||||||
VariableSettings->Mtrr[Index].Base
|
VariableSettings->Mtrr[Index].Base
|
||||||
|
@ -1362,6 +1429,7 @@ MtrrDebugPrintAllMtrrs (
|
||||||
{
|
{
|
||||||
MTRR_SETTINGS MtrrSettings;
|
MTRR_SETTINGS MtrrSettings;
|
||||||
UINTN Index;
|
UINTN Index;
|
||||||
|
UINTN VariableMtrrCount;
|
||||||
|
|
||||||
MtrrGetAllMtrrs (&MtrrSettings);
|
MtrrGetAllMtrrs (&MtrrSettings);
|
||||||
DEBUG((EFI_D_ERROR, "DefaultType = %016lx\n", MtrrSettings.MtrrDefType));
|
DEBUG((EFI_D_ERROR, "DefaultType = %016lx\n", MtrrSettings.MtrrDefType));
|
||||||
|
@ -1372,7 +1440,9 @@ MtrrDebugPrintAllMtrrs (
|
||||||
MtrrSettings.Fixed.Mtrr[Index]
|
MtrrSettings.Fixed.Mtrr[Index]
|
||||||
));
|
));
|
||||||
}
|
}
|
||||||
for (Index = 0; Index < MTRR_NUMBER_OF_VARIABLE_MTRR; Index++) {
|
|
||||||
|
VariableMtrrCount = GetVariableMtrrCount ();
|
||||||
|
for (Index = 0; Index < VariableMtrrCount; Index++) {
|
||||||
DEBUG((
|
DEBUG((
|
||||||
EFI_D_ERROR, "Variable[%02d] = %016lx, %016lx\n",
|
EFI_D_ERROR, "Variable[%02d] = %016lx, %016lx\n",
|
||||||
Index,
|
Index,
|
||||||
|
|
Loading…
Reference in New Issue