mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg: remove obsolete/outdated AArch64 bootstrap
Harking back to the earliest days of software development for AArch64, this piece of code abstracted away "early setup stuff" when the software model came out of reset. However, it is unmaintained and has been superseded by ARM Trusted Firmware. So drop it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
This commit is contained in:
Leif Lindholm
parent
ca6d61b226
commit
46a9bc0175
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@ -1,28 +0,0 @@
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Copyright (c) 2011-2013 ARM Limited
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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||||
met:
|
||||
|
||||
* Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
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||||
* Neither the name of ARM nor the names of its contributors may be
|
||||
used to endorse or promote products derived from this software
|
||||
without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
|
||||
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
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TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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@ -1,96 +0,0 @@
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#
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# Makefile - build a UEFI boot image for booting from different exception levels.
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#
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# Copyright (C) 2011-2013 ARM Limited.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met:
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#
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# * Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
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# the documentation and/or other materials provided with the
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# distribution.
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# * Neither the name of ARM nor the names of its contributors may be
|
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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# PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# This license can also be found in the LICENSE.TXT file.
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# VE
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PHYS_OFFSET := 0x80000000
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UART_BASE := 0x1c090000
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GIC_DIST_BASE := 0x2c001000
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GIC_CPU_BASE := 0x2c002000
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CNTFRQ := 0x01800000 # 24Mhz
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BOOTLOADER := boot.S
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LD_SCRIPT := model.lds.S
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IMAGE_1 := uefi-bootstrap-el1.axf
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IMAGE_2 := uefi-bootstrap-el2.axf
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IMAGE_3 := uefi-bootstrap-el3.axf
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IMAGE_3F := uefi-bootstrap-el3-foundation.axf
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CROSS_COMPILE ?= aarch64-none-elf-
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CC := $(CROSS_COMPILE)gcc
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LD := $(CROSS_COMPILE)ld
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all: $(IMAGE_1) $(IMAGE_2) $(IMAGE_3) $(IMAGE_3F)
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clean:
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rm -f *.axf *.o *.lds
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$(IMAGE_1): boot1.o model1.lds
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$(LD) -o $@ --script=model1.lds
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$(IMAGE_2): boot2.o model2.lds
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$(LD) -o $@ --script=model2.lds
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$(IMAGE_3): boot3.o model3.lds
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$(LD) -o $@ --script=model3.lds
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$(IMAGE_3F): boot3f.o model3f.lds
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$(LD) -o $@ --script=model3f.lds
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boot1.o: $(BOOTLOADER) Makefile
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$(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DSTART_EL2=1 -DSTART_EL1=1 -c -o $@ $(BOOTLOADER)
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boot2.o: $(BOOTLOADER) Makefile
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$(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DSTART_EL2=1 -c -o $@ $(BOOTLOADER)
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boot3.o: $(BOOTLOADER) Makefile
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$(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -c -o $@ $(BOOTLOADER)
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boot3f.o: $(BOOTLOADER) Makefile
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$(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DFOUNDATION_MODEL=1 -c -o $@ $(BOOTLOADER)
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model1.lds: $(LD_SCRIPT) Makefile boot1.o
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$(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT1 -E -P -C -o $@ $<
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model2.lds: $(LD_SCRIPT) Makefile boot2.o
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$(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT2 -E -P -C -o $@ $<
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model3.lds: $(LD_SCRIPT) Makefile boot3.o
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$(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT3 -E -P -C -o $@ $<
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model3f.lds: $(LD_SCRIPT) Makefile boot3f.o
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$(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT3F -E -P -C -o $@ $<
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.PHONY: all clean
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@ -1,183 +0,0 @@
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/*
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* boot.S - simple register setup code for junping to a second stage bootloader
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*
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* Copyright (C) 2011-2013 ARM Limited.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
|
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* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of ARM nor the names of its contributors may be
|
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* used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
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* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* This license can also be found in the LICENSE.TXT file.
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*/
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.text
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.globl _start
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.set LED_ADDR, 0x1c010008
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_start:
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/*
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* EL3 initialisation
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*/
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// Set LED to show progress.
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ldr x1, =LED_ADDR
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mov w0, #0x1
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str w0, [x1]
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dsb sy
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#if defined START_EL2
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mrs x0, CurrentEL
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cmp x0, #0xc // EL3?
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b.ne start_ns // skip EL3 initialisation
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mov x0, #0x30 // RES1
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orr x0, x0, #(1 << 0) // Non-secure bit
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orr x0, x0, #(1 << 8) // HVC enable
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orr x0, x0, #(1 << 10) // 64-bit EL2
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msr scr_el3, x0
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msr cptr_el3, xzr // Disable copro. traps to EL3
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ldr x0, =CNTFRQ
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msr cntfrq_el0, x0
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/*
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* Check for the primary CPU to avoid a race on the distributor
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* registers.
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*/
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mrs x0, mpidr_el1
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tst x0, #15
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b.ne 1f // secondary CPU
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ldr x1, =GIC_DIST_BASE // GICD_CTLR
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mov w0, #3 // EnableGrp0 | EnableGrp1
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str w0, [x1]
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1: ldr x1, =GIC_DIST_BASE + 0x80 // GICD_IGROUPR
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mov w0, #~0 // Grp1 interrupts
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str w0, [x1], #4
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b.ne 2f // Only local interrupts for secondary CPUs
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str w0, [x1], #4
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str w0, [x1], #4
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2: ldr x1, =GIC_CPU_BASE // GICC_CTLR
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ldr w0, [x1]
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orr w0, w0, #3 // EnableGrp0 | EnableGrp1
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str w0, [x1]
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mov w0, #1 << 7 // allow NS access to GICC_PMR
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str w0, [x1, #4] // GICC_PMR
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msr sctlr_el2, xzr
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#if defined START_EL1
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/* Now setup our EL1. Controlled by EL2 config on Model */
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mrs x0, hcr_el2 // Read EL2 Hypervisor configuration Register
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orr x0, x0, #(1 << 31) // Set EL1 to be 64bit
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// Send all interrupts to their respective Exception levels for EL2
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bic x0, x0, #(1 << 3) // Disable virtual FIQ
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bic x0, x0, #(1 << 4) // Disable virtual IRQ
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bic x0, x0, #(1 << 5) // Disable virtual SError and Abort
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msr hcr_el2, x0 // Write back our settings
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/*
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* Enable architected timer access
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*/
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mrs x0, cnthctl_el2
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orr x0, x0, #3 // Enable EL1 access to timers
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msr cnthctl_el2, x0
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mrs x0, cntkctl_el1
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orr x0, x0, #3 // EL0 access to counters
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msr cntkctl_el1, x0
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/* Set ID regs */
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mrs x0, midr_el1
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mrs x1, mpidr_el1
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msr vpidr_el2, x0
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msr vmpidr_el2, x1
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/* Coprocessor traps. */
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mov x0, #0x33ff
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msr cptr_el2, x0 // Disable copro. traps to EL2
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msr hstr_el2, xzr // Disable CP15 traps to EL2
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#endif // START_EL1
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/* Configure UART. Primary CPU only */
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mrs x4, mpidr_el1
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tst x4, #15
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b.ne 1f
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/*
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* UART initialisation (38400 8N1)
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*/
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ldr x4, =UART_BASE // UART base
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mov w5, #0x10 // ibrd
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str w5, [x4, #0x24]
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mov w5, #0xc300
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orr w5, w5, #0x0001 // cr
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str w5, [x4, #0x30]
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/*
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* Prepare the switch to the EL2_SP2 mode from EL3
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*/
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1: ldr x0, =start_ns // Return after mode switch
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#if defined START_EL1
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mov x1, #0x3c5 // EL1_SP1 | D | A | I | F
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#else
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mov x1, #0x3c9 // EL2_SP2 | D | A | I | F
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#endif
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msr elr_el3, x0
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msr spsr_el3, x1
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eret
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#endif // START_EL2
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start_ns:
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/*
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* We do not have NOR flash on the Foundation model. So run UEFI from RAM.
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* On the full model we use the NOR FLASH to store UEFI, so start there.
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*/
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#if defined FOUNDATION_MODEL
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mov x0, #0xa0000000
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#else
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mov x0, #0x0
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#endif
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br x0
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.ltorg
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.org 0x200
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@ -1,77 +0,0 @@
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/*
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* model.lds.S - simple linker script for stand-alone Linux booting
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*
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* Copyright (C) 2011, 2012 ARM Limited.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions are
|
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* met:
|
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*
|
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* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
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* distribution.
|
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* * Neither the name of ARM nor the names of its contributors may be
|
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* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
|
||||
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
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*
|
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* This license can also be found in the LICENSE.TXT file.
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*/
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OUTPUT_FORMAT("elf64-littleaarch64")
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OUTPUT_ARCH(aarch64)
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TARGET(binary)
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#ifdef BOOT1
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INPUT(./boot1.o)
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#endif
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#ifdef BOOT2
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INPUT(./boot2.o)
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#endif
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#ifdef BOOT3
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INPUT(./boot3.o)
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#endif
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#ifdef BOOT3F
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INPUT(./boot3f.o)
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#endif
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SECTIONS
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{
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. = PHYS_OFFSET;
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#ifdef BOOT1
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.text : { boot1.o }
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#endif
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#ifdef BOOT2
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.text : { boot2.o }
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#endif
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#ifdef BOOT3
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.text : { boot3.o }
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#endif
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#ifdef BOOT3F
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.text : { boot3f.o }
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#endif
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.data : { *(.data) }
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.bss : { *(.bss) }
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}
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@ -1,88 +0,0 @@
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<h1>AArch64 UEFI bootstraps</h1>
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<p>Copyright (c) 2011-2013 ARM Limited. All rights reserved.
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See the <code>LICENSE.TXT</code> file for more information.</p>
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<p>Contents:</p>
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<ul>
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<li>Introduction</li>
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<li>Build</li>
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<li>Use on ARMv8 RTSM and FVP models</li>
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<li>Use on ARMv8 Foundation model</li>
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</ul>
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<h2>Introduction</h2>
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<p>A bootstrap can be used to change the model state, like the Exception
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Level (EL), before executing the UEFI binary.</p>
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<p>For the ARMv8 RTSM and FVP models this can be used to show/test the UEFI binary
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starting at different exception levels. The ARMv8 models start at EL3 by
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default.</p>
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<p>In the case of the Foundation model a bootstrap is required to jump to the
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UEFI binary as loaded in RAM. This is required as the Foundation model cannot
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load and execute UEFI binaries directly. The Foundation model can only load and
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execute ELF binaries.</p>
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<h2>Build</h2>
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<p>Build the bootstraps using a AArch64 GCC cross-compiler. By default the
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<code>Makefile</code> is configured to assume a GCC bare-metal toolchain:</p>
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<pre><code>PATH=$PATH:<path/to/baremetal-tools/bin/> make clean
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PATH=$PATH:<path/to/baremetal-tools/bin/> make
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</code></pre>
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<p>To build the bootstraps with a Linux GCC toolchain use the following
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commands:</p>
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<pre><code>PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> make clean
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PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> CROSS_COMPILE=<gcc-prefix> make
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</code></pre>
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<p>The <code>gcc-prefix</code> depends on the specific toolchain distribution used. It can be
|
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"aarch64-linux-gnu-" for example.</p>
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|
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<p>This will result in four <code>axf</code> files:</p>
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<ul>
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<li><p>uefi-bootstrap-el3 : The bootstrap jumps to the UEFI code in FLASH without
|
||||
changing anything.</p></li>
|
||||
<li><p>uefi-bootstrap-el2 : Setup EL3 and switch the model to EL2 before jumping to the
|
||||
UEFI code in FLASH.</p></li>
|
||||
<li><p>uefi-bootstrap-el1 : Setup EL3 and prepare to run at non-secure EL1. Switch to
|
||||
non-secure EL1 and run the UEFI code in FLASH.</p></li>
|
||||
<li><p>uefi-bootstrap-el3-foundation : The bootstrap jumps to the UEFI code in RAM
|
||||
without changing anything. Only to be used with the
|
||||
Foundation model. The Foundation model does not have
|
||||
non-secure memory at address <code>0x0</code> and thus the UEFI image
|
||||
should be pre-loaded into non-secure RAM at address
|
||||
<code>0xA0000000</code>.</p></li>
|
||||
</ul>
|
||||
|
||||
<h2>Use on ARMv8 RTSM and FVP models</h2>
|
||||
|
||||
<p>Add the '-a' option to the model start script and point to the required
|
||||
bootstrap:</p>
|
||||
|
||||
<pre><code>< ... model start script as described in top-level readme file ... >
|
||||
-a <path/to/bootstrap-binary-file>
|
||||
</code></pre>
|
||||
|
||||
<p>NOTE: The Foundation model bootstrap should not be used with these models.</p>
|
||||
|
||||
<h2>Use on ARMv8 Foundation model</h2>
|
||||
|
||||
<p>The Foundation model takes an option for an ELF file to be loaded as well as an
|
||||
option to load a binary data blob into RAM. This can be used to run UEFI in the
|
||||
following manner:</p>
|
||||
|
||||
<pre><code><PATH_TO_INSTALLED_FOUNDATION_MODEL>/Foundation_v8 --cores=2 --visualization
|
||||
--image=uefi-bootstrap-el3-foundation.axf --nsdata=RTSM_VE_FOUNDATIONV8_EFI.fd@0xA0000000
|
||||
</code></pre>
|
||||
|
||||
<p>NOTE: The RTSM version of the bootstraps and UEFI image will not work as
|
||||
expected on the Foundation model. Foundation model specific versions
|
||||
should be used.</p>
|
||||
|
|
@ -1,92 +0,0 @@
|
|||
AArch64 UEFI bootstraps
|
||||
=======================
|
||||
|
||||
Copyright (c) 2011-2013 ARM Limited. All rights reserved.
|
||||
See the `LICENSE.TXT` file for more information.
|
||||
|
||||
Contents:
|
||||
|
||||
* Introduction
|
||||
* Build
|
||||
* Use on ARMv8 RTSM and FVP models
|
||||
* Use on ARMv8 Foundation model
|
||||
|
||||
|
||||
Introduction
|
||||
------------
|
||||
|
||||
A bootstrap can be used to change the model state, like the Exception
|
||||
Level (EL), before executing the UEFI binary.
|
||||
|
||||
For the ARMv8 RTSM and FVP models this can be used to show/test the UEFI binary
|
||||
starting at different exception levels. The ARMv8 models start at EL3 by
|
||||
default.
|
||||
|
||||
In the case of the Foundation model a bootstrap is required to jump to the
|
||||
UEFI binary as loaded in RAM. This is required as the Foundation model cannot
|
||||
load and execute UEFI binaries directly. The Foundation model can only load and
|
||||
execute ELF binaries.
|
||||
|
||||
|
||||
Build
|
||||
-----
|
||||
|
||||
Build the bootstraps using a AArch64 GCC cross-compiler. By default the
|
||||
`Makefile` is configured to assume a GCC bare-metal toolchain:
|
||||
|
||||
PATH=$PATH:<path/to/baremetal-tools/bin/> make clean
|
||||
PATH=$PATH:<path/to/baremetal-tools/bin/> make
|
||||
|
||||
To build the bootstraps with a Linux GCC toolchain use the following
|
||||
commands:
|
||||
|
||||
PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> make clean
|
||||
PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> CROSS_COMPILE=<gcc-prefix> make
|
||||
|
||||
The `gcc-prefix` depends on the specific toolchain distribution used. It can be
|
||||
"aarch64-linux-gnu-" for example.
|
||||
|
||||
This will result in four `axf` files:
|
||||
|
||||
* uefi-bootstrap-el3 : The bootstrap jumps to the UEFI code in FLASH without
|
||||
changing anything.
|
||||
|
||||
* uefi-bootstrap-el2 : Setup EL3 and switch the model to EL2 before jumping to the
|
||||
UEFI code in FLASH.
|
||||
|
||||
* uefi-bootstrap-el1 : Setup EL3 and prepare to run at non-secure EL1. Switch to
|
||||
non-secure EL1 and run the UEFI code in FLASH.
|
||||
|
||||
* uefi-bootstrap-el3-foundation : The bootstrap jumps to the UEFI code in RAM
|
||||
without changing anything. Only to be used with the
|
||||
Foundation model. The Foundation model does not have
|
||||
non-secure memory at address `0x0` and thus the UEFI image
|
||||
should be pre-loaded into non-secure RAM at address
|
||||
`0xA0000000`.
|
||||
|
||||
|
||||
Use on ARMv8 RTSM and FVP models
|
||||
--------------------------------
|
||||
|
||||
Add the '-a' option to the model start script and point to the required
|
||||
bootstrap:
|
||||
|
||||
< ... model start script as described in top-level readme file ... >
|
||||
-a <path/to/bootstrap-binary-file>
|
||||
|
||||
NOTE: The Foundation model bootstrap should not be used with these models.
|
||||
|
||||
|
||||
Use on ARMv8 Foundation model
|
||||
-----------------------------
|
||||
|
||||
The Foundation model takes an option for an ELF file to be loaded as well as an
|
||||
option to load a binary data blob into RAM. This can be used to run UEFI in the
|
||||
following manner:
|
||||
|
||||
<PATH_TO_INSTALLED_FOUNDATION_MODEL>/Foundation_v8 --cores=2 --visualization
|
||||
--image=uefi-bootstrap-el3-foundation.axf --nsdata=RTSM_VE_FOUNDATIONV8_EFI.fd@0xA0000000
|
||||
|
||||
NOTE: The RTSM version of the bootstraps and UEFI image will not work as
|
||||
expected on the Foundation model. Foundation model specific versions
|
||||
should be used.
|
||||
Loading…
Reference in New Issue