mirror of https://github.com/acidanthera/audk.git
IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993 Add FSP-I API entry point for SMM support. Also update 64bit API entry code to assign ApiIdx to RAX to avoid confusion. Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
This commit is contained in:
parent
24eac4caf3
commit
4824924377
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@ -0,0 +1,54 @@
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## @file
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# Sec Core for FSP
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#
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# Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = FspSecCoreI
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FILE_GUID = 558782b5-782d-415e-ab9e-0ceb79dc3425
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MODULE_TYPE = SEC
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VERSION_STRING = 1.0
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#
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# The following information is for reference only and not required by the build tools.
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#
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# VALID_ARCHITECTURES = IA32 X64
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#
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[Sources]
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SecFspApiChk.c
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SecFsp.h
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[Sources.X64]
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X64/FspApiEntryI.nasm
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X64/FspApiEntryCommon.nasm
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X64/FspHelper.nasm
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[Sources.IA32]
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Ia32/FspApiEntryI.nasm
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Ia32/FspApiEntryCommon.nasm
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Ia32/FspHelper.nasm
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[Binaries.Ia32]
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RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC
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[Packages]
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MdePkg/MdePkg.dec
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IntelFsp2Pkg/IntelFsp2Pkg.dec
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[LibraryClasses]
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BaseMemoryLib
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DebugLib
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BaseLib
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PciCf8Lib
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SerialPortLib
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FspSwitchStackLib
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FspCommonLib
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FspSecPlatformLib
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@ -0,0 +1,44 @@
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;; @file
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; Provide FSP API entry points.
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;
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; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;;
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SECTION .text
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;
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; Following functions will be provided in C
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;
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extern ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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; FspApiCommonContinue API
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;
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; This is the FSP API common entry point to resume the FSP execution
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(FspApiCommonContinue)
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ASM_PFX(FspApiCommonContinue):
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jmp $
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;----------------------------------------------------------------------------
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; FspSmmInit API
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;
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; This FSP API will notify the FSP about the different phases in the boot
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; process
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(FspSmmInitApi)
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ASM_PFX(FspSmmInitApi):
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mov eax, 7 ; FSP_API_INDEX.FspSmmInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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; Module Entrypoint API
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;----------------------------------------------------------------------------
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global ASM_PFX(_ModuleEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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jmp $
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; Add reference to APIs so that it will not be optimized by compiler
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jmp ASM_PFX(FspSmmInitApi)
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@ -71,6 +71,19 @@ FspApiCallingCheck (
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Status = EFI_INVALID_PARAMETER;
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}
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}
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} else if (ApiIdx == FspSmmInitApiIndex) {
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//
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// FspSmmInitApiIndex check
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//
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if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {
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Status = EFI_UNSUPPORTED;
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} else {
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if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
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Status = EFI_UNSUPPORTED;
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} else if (EFI_ERROR (FspUpdSignatureCheck (FspSmmInitApiIndex, ApiParam))) {
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Status = EFI_INVALID_PARAMETER;
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}
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}
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} else {
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Status = EFI_UNSUPPORTED;
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}
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@ -24,7 +24,7 @@ STACK_SAVED_RAX_OFFSET EQU 8 * 7 ; size of a general purpose register *
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;----------------------------------------------------------------------------
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global ASM_PFX(NotifyPhaseApi)
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ASM_PFX(NotifyPhaseApi):
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mov eax, 2 ; FSP_API_INDEX.NotifyPhaseApiIndex
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mov rax, 2 ; FSP_API_INDEX.NotifyPhaseApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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;----------------------------------------------------------------------------
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global ASM_PFX(FspSiliconInitApi)
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ASM_PFX(FspSiliconInitApi):
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mov eax, 5 ; FSP_API_INDEX.FspSiliconInitApiIndex
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mov rax, 5 ; FSP_API_INDEX.FspSiliconInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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@ -54,7 +54,7 @@ ASM_PFX(FspSiliconInitApi):
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global ASM_PFX(FspMultiPhaseSiInitApi)
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ASM_PFX(FspMultiPhaseSiInitApi):
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mov eax, 6 ; FSP_API_INDEX.FspMultiPhaseSiInitApiIndex
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mov rax, 6 ; FSP_API_INDEX.FspMultiPhaseSiInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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;
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; Handle FspMultiPhaseSiInitApiIndex API
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;
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cmp eax, 6
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cmp rax, 6 ; FSP_API_INDEX.FspMultiPhaseSiInitApiIndex
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jnz NotMultiPhaseSiInitApi
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PUSHA_64
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@ -0,0 +1,44 @@
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;; @file
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; Provide FSP API entry points.
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;
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; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;;
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SECTION .text
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;
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; Following functions will be provided in C
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;
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extern ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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; FspApiCommonContinue API
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;
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; This is the FSP API common entry point to resume the FSP execution
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(FspApiCommonContinue)
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ASM_PFX(FspApiCommonContinue):
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jmp $
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;----------------------------------------------------------------------------
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; FspSmmInit API
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;
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; This FSP API will notify the FSP about the different phases in the boot
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; process
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(FspSmmInitApi)
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ASM_PFX(FspSmmInitApi):
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mov rax, 7 ; FSP_API_INDEX.FspSmmInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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; Module Entrypoint API
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;----------------------------------------------------------------------------
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global ASM_PFX(_ModuleEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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jmp $
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; Add reference to APIs so that it will not be optimized by compiler
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jmp ASM_PFX(FspSmmInitApi)
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@ -55,7 +55,7 @@ FSP_HEADER_CFGREG_OFFSET EQU 24h
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;----------------------------------------------------------------------------
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global ASM_PFX(FspMemoryInitApi)
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ASM_PFX(FspMemoryInitApi):
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mov eax, 3 ; FSP_API_INDEX.FspMemoryInitApiIndex
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mov rax, 3 ; FSP_API_INDEX.FspMemoryInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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;----------------------------------------------------------------------------
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global ASM_PFX(TempRamExitApi)
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ASM_PFX(TempRamExitApi):
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mov eax, 4 ; FSP_API_INDEX.TempRamExitApiIndex
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mov rax, 4 ; FSP_API_INDEX.TempRamExitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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;----------------------------------------------------------------------------
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global ASM_PFX(NotifyPhaseApi)
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ASM_PFX(NotifyPhaseApi):
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mov eax, 2 ; FSP_API_INDEX.NotifyPhaseApiIndex
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mov rax, 2 ; FSP_API_INDEX.NotifyPhaseApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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;----------------------------------------------------------------------------
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global ASM_PFX(FspSiliconInitApi)
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ASM_PFX(FspSiliconInitApi):
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mov eax, 5 ; FSP_API_INDEX.FspSiliconInitApiIndex
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mov rax, 5 ; FSP_API_INDEX.FspSiliconInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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IN FSP_MULTI_PHASE_PARAMS *MultiPhaseSiInitParamPtr
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);
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/**
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This FSP API initializes SMM and provide any OS runtime silicon services,
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including Reliability, Availability, and Serviceability (RAS) features implemented by the CPU.
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@param[in] FspiUpdDataPtr Pointer to the FSPI_UPD data structure.
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If NULL, FSP will use the default parameters.
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@retval EFI_SUCCESS FSP execution environment was initialized successfully.
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@retval EFI_INVALID_PARAMETER Input parameters are invalid.
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@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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@retval EFI_DEVICE_ERROR FSP initialization failed.
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@retval FSP_STATUS_RESET_REQUIREDx A reset is required. These status codes will not be returned during S3.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *FSP_SMM_INIT)(
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IN VOID *FspiUpdDataPtr
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);
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#endif
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#include <FspEas.h>
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#define FSP_IN_API_MODE 0
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#define FSP_IN_DISPATCH_MODE 1
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#define FSP_GLOBAL_DATA_VERSION 1
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#define FSP_IN_API_MODE 0
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#define FSP_IN_DISPATCH_MODE 1
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#define FSP_GLOBAL_DATA_VERSION 1
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#pragma pack(1)
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TempRamExitApiIndex,
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FspSiliconInitApiIndex,
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FspMultiPhaseSiInitApiIndex,
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FspSmmInitApiIndex,
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FspApiIndexMax
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} FSP_API_INDEX;
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typedef struct {
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VOID *DataPtr;
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UINTN MicrocodeRegionBase;
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UINTN MicrocodeRegionSize;
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UINTN CodeRegionBase;
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UINTN CodeRegionSize;
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UINTN Reserved;
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VOID *DataPtr;
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UINTN MicrocodeRegionBase;
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UINTN MicrocodeRegionSize;
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UINTN CodeRegionBase;
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UINTN CodeRegionSize;
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UINTN Reserved;
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} FSP_PLAT_DATA;
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#define FSP_GLOBAL_DATA_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'D')
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#define FSP_PERFORMANCE_DATA_TIMER_MASK 0xFFFFFFFFFFFFFF
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typedef struct {
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UINT32 Signature;
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UINT8 Version;
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UINT8 Reserved1[3];
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UINT32 Signature;
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UINT8 Version;
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UINT8 Reserved1[3];
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///
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/// Offset 0x08
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///
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UINTN CoreStack;
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UINTN Reserved2;
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UINTN CoreStack;
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UINTN Reserved2;
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///
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/// IA32: Offset 0x10; X64: Offset 0x18
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///
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UINT32 StatusCode;
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UINT8 ApiIdx;
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UINT32 StatusCode;
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UINT8 ApiIdx;
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///
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/// 0: FSP in API mode; 1: FSP in DISPATCH mode
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///
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UINT8 FspMode;
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UINT8 OnSeparateStack;
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UINT8 Reserved3;
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UINT32 NumberOfPhases;
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UINT32 PhasesExecuted;
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UINT32 Reserved4[8];
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UINT8 FspMode;
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UINT8 OnSeparateStack;
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UINT8 Reserved3;
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UINT32 NumberOfPhases;
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UINT32 PhasesExecuted;
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UINT32 Reserved4[8];
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///
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/// IA32: Offset 0x40; X64: Offset 0x48
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/// Start of UINTN and pointer section
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VOID *TempRamInitUpdPtr;
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VOID *MemoryInitUpdPtr;
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VOID *SiliconInitUpdPtr;
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VOID *SmmInitUpdPtr;
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///
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/// IA32: Offset 0x64; X64: Offset 0x90
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/// IA32: Offset 0x68; X64: Offset 0x98
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/// To store function parameters pointer
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/// so it can be retrieved after stack switched.
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///
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VOID *FunctionParameterPtr;
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FSP_INFO_HEADER *FspInfoHeader;
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VOID *UpdDataPtr;
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UINTN Reserved5;
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///
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/// End of UINTN and pointer section
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///
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UINT8 Reserved5[16];
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UINT8 Reserved6[16];
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UINT32 PerfSig;
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UINT16 PerfLen;
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UINT16 Reserved6;
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UINT16 Reserved7;
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UINT32 PerfIdx;
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UINT64 PerfData[32];
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} FSP_GLOBAL_DATA;
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#define FSP_INFO_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'H')
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#define IMAGE_ATTRIBUTE_GRAPHICS_SUPPORT BIT0
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#define IMAGE_ATTRIBUTE_DISPATCH_MODE_SUPPORT BIT1
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#define IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT BIT2
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#define FSP_IA32 0
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#define FSP_X64 1
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#define IMAGE_ATTRIBUTE_GRAPHICS_SUPPORT BIT0
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#define IMAGE_ATTRIBUTE_DISPATCH_MODE_SUPPORT BIT1
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#define IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT BIT2
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#define FSP_IA32 0
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#define FSP_X64 1
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#pragma pack(1)
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#pragma pack(1)
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///
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/// FSP Information Header as described in FSP v2.0 Spec section 5.1.1.
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@ -159,6 +159,14 @@ typedef struct {
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/// Byte 0x4E: Reserved4.
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///
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UINT16 Reserved4;
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///
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/// Byte 0x50: Offset for the API for the Multi-Phase memory initialization.
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///
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UINT32 FspMultiPhaseMemInitEntryOffset;
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///
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/// Byte 0x54: Offset for the API to initialize SMM.
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///
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UINT32 FspSmmInitEntryOffset;
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} FSP_INFO_HEADER;
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///
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// UINT32 PatchData[];
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} FSP_PATCH_TABLE;
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#pragma pack()
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#pragma pack()
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extern EFI_GUID gFspHeaderFileGuid;
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|
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@ -68,6 +68,7 @@
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IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
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IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
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IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf
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IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
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IntelFsp2Pkg/FspSecCore/Fsp22SecCoreS.inf
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IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf
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@ -953,8 +953,8 @@ EndList
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return NoFileChange
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def CreateSplitUpdTxt (self, UpdTxtFile):
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GuidList = ['FSP_T_UPD_TOOL_GUID','FSP_M_UPD_TOOL_GUID','FSP_S_UPD_TOOL_GUID']
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SignatureList = ['0x545F', '0x4D5F','0x535F'] # _T, _M, and _S signature for FSPT, FSPM, FSPS
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GuidList = ['FSP_T_UPD_TOOL_GUID','FSP_M_UPD_TOOL_GUID','FSP_S_UPD_TOOL_GUID','FSP_I_UPD_TOOL_GUID']
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SignatureList = ['0x545F', '0x4D5F','0x535F','0x495F'] # _T, _M, _S and _I signature for FSPT, FSPM, FSPS, FSPI
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for Index in range(len(GuidList)):
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UpdTxtFile = ''
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FvDir = self._FvDir
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@ -1288,19 +1288,21 @@ EndList
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Chars.append(chr(Value & 0xFF))
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Value = Value >> 8
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SignatureStr = ''.join(Chars)
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# Signature will be _T / _M / _S for FSPT / FSPM / FSPS accordingly
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# Signature will be _T / _M / _S / _I for FSPT / FSPM / FSPS /FSPI accordingly
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if '_T' in SignatureStr[6:6+2]:
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TxtBody.append("#define FSPT_UPD_SIGNATURE %s /* '%s' */\n\n" % (Item['value'], SignatureStr))
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elif '_M' in SignatureStr[6:6+2]:
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TxtBody.append("#define FSPM_UPD_SIGNATURE %s /* '%s' */\n\n" % (Item['value'], SignatureStr))
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elif '_S' in SignatureStr[6:6+2]:
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TxtBody.append("#define FSPS_UPD_SIGNATURE %s /* '%s' */\n\n" % (Item['value'], SignatureStr))
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elif '_I' in SignatureStr[6:6+2]:
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TxtBody.append("#define FSPI_UPD_SIGNATURE %s /* '%s' */\n\n" % (Item['value'], SignatureStr))
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TxtBody.append("\n")
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||||
for Region in ['UPD']:
|
||||
UpdOffsetTable = []
|
||||
UpdSignature = ['0x545F', '0x4D5F', '0x535F'] #['_T', '_M', '_S'] signature for FSPT, FSPM, FSPS
|
||||
UpdStructure = ['FSPT_UPD', 'FSPM_UPD', 'FSPS_UPD']
|
||||
UpdSignature = ['0x545F', '0x4D5F', '0x535F', '0x495F'] #['_T', '_M', '_S', '_I'] signature for FSPT, FSPM, FSPS, FSPI
|
||||
UpdStructure = ['FSPT_UPD', 'FSPM_UPD', 'FSPS_UPD', 'FSPI_UPD']
|
||||
for Item in self._CfgItemList:
|
||||
if Item["cname"] == 'Signature' and Item["value"][0:6] in UpdSignature:
|
||||
Item["offset"] = 0 # re-initialize offset to 0 when new UPD structure starting
|
||||
|
@ -1393,11 +1395,12 @@ EndList
|
|||
HeaderTFileName = 'FsptUpd.h'
|
||||
HeaderMFileName = 'FspmUpd.h'
|
||||
HeaderSFileName = 'FspsUpd.h'
|
||||
HeaderIFileName = 'FspiUpd.h'
|
||||
|
||||
UpdRegionCheck = ['FSPT', 'FSPM', 'FSPS'] # FSPX_UPD_REGION
|
||||
UpdConfigCheck = ['FSP_T', 'FSP_M', 'FSP_S'] # FSP_X_CONFIG, FSP_X_TEST_CONFIG, FSP_X_RESTRICTED_CONFIG
|
||||
UpdSignatureCheck = ['FSPT_UPD_SIGNATURE', 'FSPM_UPD_SIGNATURE', 'FSPS_UPD_SIGNATURE']
|
||||
ExcludedSpecificUpd = ['FSPT_ARCH_UPD', 'FSPM_ARCH_UPD', 'FSPS_ARCH_UPD']
|
||||
UpdRegionCheck = ['FSPT', 'FSPM', 'FSPS', 'FSPI'] # FSPX_UPD_REGION
|
||||
UpdConfigCheck = ['FSP_T', 'FSP_M', 'FSP_S', 'FSP_I'] # FSP_X_CONFIG, FSP_X_TEST_CONFIG, FSP_X_RESTRICTED_CONFIG
|
||||
UpdSignatureCheck = ['FSPT_UPD_SIGNATURE', 'FSPM_UPD_SIGNATURE', 'FSPS_UPD_SIGNATURE', 'FSPI_UPD_SIGNATURE']
|
||||
ExcludedSpecificUpd = ['FSPT_ARCH_UPD', 'FSPM_ARCH_UPD', 'FSPS_ARCH_UPD', 'FSPI_ARCH_UPD']
|
||||
ExcludedSpecificUpd1 = ['FSPT_ARCH2_UPD', 'FSPM_ARCH2_UPD', 'FSPS_ARCH2_UPD']
|
||||
|
||||
IncLines = []
|
||||
|
@ -1420,6 +1423,9 @@ EndList
|
|||
elif UpdRegionCheck[item] == 'FSPS':
|
||||
HeaderFd = open(os.path.join(FvDir, HeaderSFileName), "w")
|
||||
FileBase = os.path.basename(os.path.join(FvDir, HeaderSFileName))
|
||||
elif UpdRegionCheck[item] == 'FSPI':
|
||||
HeaderFd = open(os.path.join(FvDir, HeaderIFileName), "w")
|
||||
FileBase = os.path.basename(os.path.join(FvDir, HeaderIFileName))
|
||||
FileName = FileBase.replace(".", "_").upper()
|
||||
HeaderFd.write("%s\n" % (__copyright_h__ % date.today().year))
|
||||
HeaderFd.write("#ifndef __%s__\n" % FileName)
|
||||
|
@ -1696,7 +1702,7 @@ EndList
|
|||
|
||||
|
||||
def Usage():
|
||||
print ("GenCfgOpt Version 0.57")
|
||||
print ("GenCfgOpt Version 0.58")
|
||||
print ("Usage:")
|
||||
print (" GenCfgOpt UPDTXT PlatformDscFile BuildFvDir [-D Macros]")
|
||||
print (" GenCfgOpt HEADER PlatformDscFile BuildFvDir InputHFile [-D Macros]")
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
## @ SplitFspBin.py
|
||||
#
|
||||
# Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
##
|
||||
|
@ -492,7 +492,7 @@ class FspImage:
|
|||
self.FihOffset = fihoff
|
||||
self.Offset = offset
|
||||
self.FvIdxList = []
|
||||
self.Type = "XTMSXXXXOXXXXXXX"[(fih.ComponentAttribute >> 12) & 0x0F]
|
||||
self.Type = "XTMSIXXXXOXXXXXXX"[(fih.ComponentAttribute >> 12) & 0x0F]
|
||||
self.PatchList = patch
|
||||
self.PatchList.append(fihoff + 0x1C)
|
||||
|
||||
|
@ -869,7 +869,7 @@ def main ():
|
|||
parser_rebase = subparsers.add_parser('rebase', help='rebase a FSP into a new base address')
|
||||
parser_rebase.set_defaults(which='rebase')
|
||||
parser_rebase.add_argument('-f', '--fspbin' , dest='FspBinary', type=str, help='FSP binary file path', required = True)
|
||||
parser_rebase.add_argument('-c', '--fspcomp', choices=['t','m','s','o'], nargs='+', dest='FspComponent', type=str, help='FSP component to rebase', default = "['t']", required = True)
|
||||
parser_rebase.add_argument('-c', '--fspcomp', choices=['t','m','s','o','i'], nargs='+', dest='FspComponent', type=str, help='FSP component to rebase', default = "['t']", required = True)
|
||||
parser_rebase.add_argument('-b', '--newbase', dest='FspBase', nargs='+', type=str, help='Rebased FSP binary file name', default = '', required = True)
|
||||
parser_rebase.add_argument('-o', '--outdir' , dest='OutputDir', type=str, help='Output directory path', default = '.')
|
||||
parser_rebase.add_argument('-n', '--outfile', dest='OutputFile', type=str, help='Rebased FSP binary file name', default = '')
|
||||
|
|
Loading…
Reference in New Issue