mirror of https://github.com/acidanthera/audk.git
SecurityPkg: Add TPM PTP support in TCG2 Config.
This patch add PTP CRB support in BIOS Setup. It can: 1) Display the PTP capability (TIS/FIFO/CRB) 2) Display the PTP current interface (TIS/FIFO/CRB) 3) Let user select CRB/FIFO, if supported. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19743 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Yao, Jiewen
jyao1
parent
8e997ab8d3
commit
518b6f6565
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@ -1,7 +1,7 @@
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/** @file
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VFR file used by the TCG2 configuration component.
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Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -51,6 +51,32 @@ formset
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option text = STRING_TOKEN(STR_TCG2_TPM_2_0_DTPM), value = TPM_DEVICE_2_0_DTPM, flags = RESET_REQUIRED;
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endoneof;
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suppressif ideqvallist TCG2_CONFIGURATION.TpmDevice == TPM_DEVICE_NULL TPM_DEVICE_1_2;
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text
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help = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_STATE_HELP),
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text = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_STATE_PROMPT),
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text = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT);
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text
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help = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_CAPABILITY_HELP),
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text = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_CAPABILITY_PROMPT),
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text = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT);
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suppressif ideqval TCG2_CONFIGURATION_INFO.TpmDeviceInterfacePtpFifoSupported == 0
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OR ideqval TCG2_CONFIGURATION_INFO.TpmDeviceInterfacePtpCrbSupported == 0;
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oneof varid = TCG2_CONFIGURATION_INFO.TpmDeviceInterfaceAttempt,
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questionid = KEY_TPM_DEVICE_INTERFACE,
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prompt = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_PROMPT),
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help = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_HELP),
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flags = INTERACTIVE,
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option text = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_TIS), value = TPM_DEVICE_INTERFACE_TIS, flags = RESET_REQUIRED;
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option text = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_PTP_FIFO), value = TPM_DEVICE_INTERFACE_PTP_FIFO, flags = RESET_REQUIRED;
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option text = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_PTP_CRB), value = TPM_DEVICE_INTERFACE_PTP_CRB, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
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endoneof;
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endif;
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endif;
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subtitle text = STRING_TOKEN(STR_NULL);
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suppressif ideqvallist TCG2_CONFIGURATION.TpmDevice == TPM_DEVICE_NULL TPM_DEVICE_1_2;
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@ -1,7 +1,7 @@
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/** @file
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The module entry point for Tcg2 configuration module.
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Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -158,20 +158,6 @@ Tcg2ConfigDriverEntryPoint (
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PrivateData->PCRBanksDesired = CurrentActivePCRBanks;
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UpdateDefaultPCRBanks (Tcg2ConfigBin + sizeof(UINT32), ReadUnaligned32((UINT32 *)Tcg2ConfigBin) - sizeof(UINT32), CurrentActivePCRBanks);
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//
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// Save to variable so platform driver can get it.
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//
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Status = gRT->SetVariable (
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TCG2_STORAGE_NAME,
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&gTcg2ConfigFormSetGuid,
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EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
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sizeof(Tcg2Configuration),
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&Tcg2Configuration
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((EFI_D_ERROR, "Tcg2ConfigDriver: Fail to set TCG2_STORAGE_NAME\n"));
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}
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//
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// Sync data from PCD to variable, so that we do not need detect again in S3 phase.
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//
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@ -184,6 +170,7 @@ Tcg2ConfigDriverEntryPoint (
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}
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PrivateData->TpmDeviceDetected = Tcg2DeviceDetection.TpmDeviceDetected;
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Tcg2Configuration.TpmDevice = Tcg2DeviceDetection.TpmDeviceDetected;
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//
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// Save to variable so platform driver can get it.
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@ -207,6 +194,20 @@ Tcg2ConfigDriverEntryPoint (
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ASSERT_EFI_ERROR (Status);
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}
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//
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// Save to variable so platform driver can get it.
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//
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Status = gRT->SetVariable (
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TCG2_STORAGE_NAME,
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&gTcg2ConfigFormSetGuid,
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EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
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sizeof(Tcg2Configuration),
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&Tcg2Configuration
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((EFI_D_ERROR, "Tcg2ConfigDriver: Fail to set TCG2_STORAGE_NAME\n"));
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}
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//
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// We should lock Tcg2DeviceDetection, because it contains information needed at S3.
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//
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@ -4,7 +4,7 @@
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# By this module, user may select TPM device, clear TPM state, etc.
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# NOTE: This module is only for reference only, each platform should have its own setup page.
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#
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# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2015 - 2106, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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@ -57,6 +57,7 @@
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Tpm2DeviceLib
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Tpm2CommandLib
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Tcg2PhysicalPresenceLib
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IoLib
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[Guids]
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## PRODUCES ## HII
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@ -75,6 +76,7 @@
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[Pcd]
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gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid ## CONSUMES
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gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap ## CONSUMES
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gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress ## CONSUMES
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[Depex]
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gEfiTcg2ProtocolGuid AND
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@ -2,7 +2,7 @@
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HII Config Access protocol implementation of TCG2 configuration module.
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NOTE: This module is only for reference only, each platform should have its own setup page.
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Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -16,8 +16,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#include "Tcg2ConfigImpl.h"
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#include <Library/PcdLib.h>
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#include <Library/Tpm2CommandLib.h>
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#include <Library/IoLib.h>
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#include <Guid/TpmInstance.h>
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#include <IndustryStandard/TpmPtp.h>
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#define EFI_TCG2_EVENT_LOG_FORMAT_ALL (EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2 | EFI_TCG2_EVENT_LOG_FORMAT_TCG_2)
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TPM_INSTANCE_ID mTpmInstanceId[TPM_DEVICE_MAX + 1] = TPM_INSTANCE_ID_LIST;
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@ -56,6 +59,147 @@ HII_VENDOR_DEVICE_PATH mTcg2HiiVendorDevicePath = {
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UINT8 mCurrentPpRequest;
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/**
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Return PTP interface type.
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@param[in] Register Pointer to PTP register.
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@return PTP interface type.
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**/
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UINT8
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GetPtpInterface (
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IN VOID *Register
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)
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{
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PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;
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PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability;
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//
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// Check interface id
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//
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InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
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InterfaceCapability.Uint32 = MmioRead32 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);
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if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) &&
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(InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) &&
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(InterfaceId.Bits.CapCRB != 0)) {
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return TPM_DEVICE_INTERFACE_PTP_CRB;
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}
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if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) &&
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(InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) &&
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(InterfaceId.Bits.CapFIFO != 0) &&
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(InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) {
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return TPM_DEVICE_INTERFACE_PTP_FIFO;
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}
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return TPM_DEVICE_INTERFACE_TIS;
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}
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/**
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Return if PTP CRB is supported.
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@param[in] Register Pointer to PTP register.
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@retval TRUE PTP CRB is supported.
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@retval FALSE PTP CRB is unsupported.
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**/
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BOOLEAN
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IsPtpCrbSupported (
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IN VOID *Register
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)
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{
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PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;
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//
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// Check interface id
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//
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InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
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if (((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) ||
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(InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO)) &&
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(InterfaceId.Bits.CapCRB != 0)) {
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return TRUE;
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}
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return FALSE;
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}
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/**
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Return if PTP FIFO is supported.
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@param[in] Register Pointer to PTP register.
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@retval TRUE PTP FIFO is supported.
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@retval FALSE PTP FIFO is unsupported.
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**/
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BOOLEAN
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IsPtpFifoSupported (
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IN VOID *Register
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)
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{
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PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;
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//
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// Check interface id
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//
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InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
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if (((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) ||
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(InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO)) &&
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(InterfaceId.Bits.CapFIFO != 0)) {
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return TRUE;
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}
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return FALSE;
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}
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/**
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Set PTP interface type.
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@param[in] Register Pointer to PTP register.
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@param[in] PtpInterface PTP interface type.
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@retval EFI_SUCCESS PTP interface type is set.
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@retval EFI_INVALID_PARAMETER PTP interface type is invalid.
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@retval EFI_UNSUPPORTED PTP interface type is unsupported.
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@retval EFI_WRITE_PROTECTED PTP interface is locked.
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**/
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EFI_STATUS
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SetPtpInterface (
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IN VOID *Register,
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IN UINT8 PtpInterface
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)
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{
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UINT8 PtpInterfaceCurrent;
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PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;
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PtpInterfaceCurrent = GetPtpInterface (Register);
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if ((PtpInterfaceCurrent != TPM_DEVICE_INTERFACE_PTP_FIFO) &&
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(PtpInterfaceCurrent != TPM_DEVICE_INTERFACE_PTP_CRB)) {
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return EFI_UNSUPPORTED;
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}
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InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
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if (InterfaceId.Bits.IntfSelLock != 0) {
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return EFI_WRITE_PROTECTED;
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}
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switch (PtpInterface) {
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case TPM_DEVICE_INTERFACE_PTP_FIFO:
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if (InterfaceId.Bits.CapFIFO == 0) {
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return EFI_UNSUPPORTED;
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}
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InterfaceId.Bits.InterfaceSelector = PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_FIFO;
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MmioWrite32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId, InterfaceId.Uint32);
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return EFI_SUCCESS;
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case TPM_DEVICE_INTERFACE_PTP_CRB:
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if (InterfaceId.Bits.CapCRB == 0) {
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return EFI_UNSUPPORTED;
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}
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InterfaceId.Bits.InterfaceSelector = PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_CRB;
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MmioWrite32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId, InterfaceId.Uint32);
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return EFI_SUCCESS;
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default:
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return EFI_INVALID_PARAMETER;
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}
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}
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/**
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This function allows a caller to extract the current configuration for one
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or more named elements from the target driver.
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@ -267,9 +411,27 @@ Tcg2Callback (
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OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest
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)
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{
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EFI_INPUT_KEY Key;
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if ((This == NULL) || (Value == NULL) || (ActionRequest == NULL)) {
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return EFI_INVALID_PARAMETER;
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}
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if (Action == EFI_BROWSER_ACTION_CHANGING) {
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if (QuestionId == KEY_TPM_DEVICE_INTERFACE) {
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EFI_STATUS Status;
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Status = SetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress), Value->u8);
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if (EFI_ERROR (Status)) {
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CreatePopUp (
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EFI_LIGHTGRAY | EFI_BACKGROUND_BLUE,
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&Key,
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L"Error: Fail to set PTP interface!",
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NULL
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);
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return EFI_DEVICE_ERROR;
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}
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}
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}
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if (Action == EFI_BROWSER_ACTION_CHANGED) {
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if (QuestionId == KEY_TPM_DEVICE) {
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@ -504,6 +666,7 @@ InstallTcg2ConfigForm (
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TPML_PCR_SELECTION Pcrs;
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CHAR16 TempBuffer[1024];
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TCG2_CONFIGURATION_INFO Tcg2ConfigInfo;
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UINT8 TpmDeviceInterfaceDetected;
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DriverHandle = NULL;
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ConfigAccess = &PrivateData->ConfigAccess;
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@ -557,7 +720,7 @@ InstallTcg2ConfigForm (
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HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"TPM 1.2", NULL);
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break;
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case TPM_DEVICE_2_0_DTPM:
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HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"TPM 2.0 (DTPM)", NULL);
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HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"TPM 2.0", NULL);
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break;
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default:
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HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"Unknown", NULL);
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@ -604,6 +767,60 @@ InstallTcg2ConfigForm (
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FillBufferWithBootHashAlg (TempBuffer, sizeof(TempBuffer), PrivateData->ProtocolCapability.ActivePcrBanks);
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HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_ACTIVE_PCR_BANKS_CONTENT), TempBuffer, NULL);
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//
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// Update TPM device interface type
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//
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if (PrivateData->TpmDeviceDetected == TPM_DEVICE_2_0_DTPM) {
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TpmDeviceInterfaceDetected = GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
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switch (TpmDeviceInterfaceDetected) {
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case TPM_DEVICE_INTERFACE_TIS:
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HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"TIS", NULL);
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break;
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case TPM_DEVICE_INTERFACE_PTP_FIFO:
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HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"PTP FIFO", NULL);
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break;
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case TPM_DEVICE_INTERFACE_PTP_CRB:
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HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"PTP CRB", NULL);
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break;
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default:
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HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"Unknown", NULL);
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break;
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}
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Tcg2ConfigInfo.TpmDeviceInterfaceAttempt = TpmDeviceInterfaceDetected;
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switch (TpmDeviceInterfaceDetected) {
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case TPM_DEVICE_INTERFACE_TIS:
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Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = FALSE;
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Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported = FALSE;
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HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT), L"TIS", NULL);
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break;
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case TPM_DEVICE_INTERFACE_PTP_FIFO:
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case TPM_DEVICE_INTERFACE_PTP_CRB:
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Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = IsPtpFifoSupported((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
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Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported = IsPtpCrbSupported((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
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TempBuffer[0] = 0;
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if (Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported) {
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if (TempBuffer[0] != 0) {
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StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L", ");
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}
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StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L"PTP FIFO");
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}
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if (Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported) {
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if (TempBuffer[0] != 0) {
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StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L", ");
|
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}
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StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L"PTP CRB");
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}
|
||||
HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT), TempBuffer, NULL);
|
||||
break;
|
||||
default:
|
||||
Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = FALSE;
|
||||
Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported = FALSE;
|
||||
HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT), L"Unknown", NULL);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Set ConfigInfo, to control the check box.
|
||||
//
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/** @file
|
||||
Header file for NV data structure definition.
|
||||
|
||||
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -40,6 +40,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
|||
#define KEY_TPM2_PCR_BANKS_REQUEST_2 0x2005
|
||||
#define KEY_TPM2_PCR_BANKS_REQUEST_3 0x2006
|
||||
#define KEY_TPM2_PCR_BANKS_REQUEST_4 0x2007
|
||||
#define KEY_TPM_DEVICE_INTERFACE 0x2008
|
||||
|
||||
#define TPM_DEVICE_NULL 0
|
||||
#define TPM_DEVICE_1_2 1
|
||||
|
|
@ -48,6 +49,12 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
|||
#define TPM_DEVICE_MAX TPM_DEVICE_2_0_DTPM
|
||||
#define TPM_DEVICE_DEFAULT TPM_DEVICE_1_2
|
||||
|
||||
#define TPM_DEVICE_INTERFACE_TIS 0
|
||||
#define TPM_DEVICE_INTERFACE_PTP_FIFO 1
|
||||
#define TPM_DEVICE_INTERFACE_PTP_CRB 2
|
||||
#define TPM_DEVICE_INTERFACE_MAX TPM_DEVICE_INTERFACE_PTP_FIFO
|
||||
#define TPM_DEVICE_INTERFACE_DEFAULT TPM_DEVICE_INTERFACE_PTP_CRB
|
||||
|
||||
#define TCG2_PROTOCOL_VERSION_DEFAULT 0x0001
|
||||
#define EFI_TCG2_EVENT_LOG_FORMAT_DEFAULT EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2
|
||||
|
||||
|
|
@ -59,11 +66,14 @@ typedef struct {
|
|||
} TCG2_CONFIGURATION;
|
||||
|
||||
typedef struct {
|
||||
UINT8 Sha1Supported;
|
||||
UINT8 Sha256Supported;
|
||||
UINT8 Sha384Supported;
|
||||
UINT8 Sha512Supported;
|
||||
UINT8 Sm3Supported;
|
||||
BOOLEAN Sha1Supported;
|
||||
BOOLEAN Sha256Supported;
|
||||
BOOLEAN Sha384Supported;
|
||||
BOOLEAN Sha512Supported;
|
||||
BOOLEAN Sm3Supported;
|
||||
UINT8 TpmDeviceInterfaceAttempt;
|
||||
BOOLEAN TpmDeviceInterfacePtpFifoSupported;
|
||||
BOOLEAN TpmDeviceInterfacePtpCrbSupported;
|
||||
} TCG2_CONFIGURATION_INFO;
|
||||
|
||||
//
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/** @file
|
||||
String definitions for TCG configuration form.
|
||||
|
||||
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -25,6 +25,22 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
|||
#string STR_TCG2_DEVICE_HELP #language en-US "Attempt TPM Device: Disable, TPM1.2, or TPM2.0"
|
||||
#string STR_TCG2_DEVICE_CONTENT #language en-US ""
|
||||
|
||||
#string STR_TCG2_DEVICE_INTERFACE_STATE_PROMPT #language en-US "Current TPM Device Interface"
|
||||
#string STR_TCG2_DEVICE_INTERFACE_STATE_HELP #language en-US "Current TPM Device Interface: TIS, PTP FIFO, PTP CRB"
|
||||
#string STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT #language en-US ""
|
||||
|
||||
#string STR_TCG2_DEVICE_INTERFACE_CAPABILITY_PROMPT #language en-US "PTP TPM Device Interface Capability"
|
||||
#string STR_TCG2_DEVICE_INTERFACE_CAPABILITY_HELP #language en-US "PTP TPM Device Interface Capability: PTP FIFO, PTP CRB"
|
||||
#string STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT #language en-US ""
|
||||
|
||||
#string STR_TCG2_DEVICE_INTERFACE_PROMPT #language en-US "Attempt PTP TPM Device Interface"
|
||||
#string STR_TCG2_DEVICE_INTERFACE_HELP #language en-US "Attempt PTP TPM Device Interface: PTP FIFO, PTP CRB"
|
||||
#string STR_TCG2_DEVICE_INTERFACE_CONTENT #language en-US ""
|
||||
|
||||
#string STR_TCG2_DEVICE_INTERFACE_TIS #language en-US "TIS"
|
||||
#string STR_TCG2_DEVICE_INTERFACE_PTP_FIFO #language en-US "PTP FIFO"
|
||||
#string STR_TCG2_DEVICE_INTERFACE_PTP_CRB #language en-US "PTP CRB"
|
||||
|
||||
#string STR_TCG2_PP_OPERATION #language en-US "TPM2 Physical Presence Operation"
|
||||
|
||||
#string STR_TCG2_OPERATION #language en-US "TPM2 Operation"
|
||||
|
|
@ -47,7 +63,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
|||
|
||||
#string STR_TCG2_TPM_DISABLE #language en-US "Disable"
|
||||
#string STR_TCG2_TPM_1_2 #language en-US "TPM 1.2"
|
||||
#string STR_TCG2_TPM_2_0_DTPM #language en-US "TPM 2.0 (DTPM)"
|
||||
#string STR_TCG2_TPM_2_0_DTPM #language en-US "TPM 2.0"
|
||||
|
||||
#string STR_TPM2_ACTIVE_HASH_ALGO #language en-US "TPM2 Active PCR Hash Algorithm"
|
||||
#string STR_TPM2_ACTIVE_HASH_ALGO_HELP #language en-US "TPM2 Active PCR Hash Algorithm: SHA1, SHA256, SHA384, SHA512, SM3_256"
|
||||
|
|
|
|||
Loading…
Reference in New Issue