mirror of https://github.com/acidanthera/audk.git
Merge branch 'master' of https://github.com/tianocore/edk2
This commit is contained in:
commit
62989e0bd2
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@ -142,7 +142,7 @@ Lan9118DxeEntry (
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// Power up the device so we can find the MAC address
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Status = Lan9118Initialize (Snp);
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if (EFI_ERROR (Status)) {
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DEBUG ((EFI_D_ERROR, "Lan9118: Error initialising hardware\n"));
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DEBUG ((EFI_D_ERROR, "LAN9118: Error initialising hardware\n"));
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return EFI_DEVICE_ERROR;
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}
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@ -307,8 +307,7 @@ SnpInitialize (
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// Write the current configuration to the register
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MmioWrite32 (LAN9118_PMT_CTRL, PmConf);
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gBS->Stall (LAN9118_STALL);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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// Configure GPIO and HW
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Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp);
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@ -343,7 +342,7 @@ SnpInitialize (
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// Do auto-negotiation if supported
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Status = AutoNegotiate (AUTO_NEGOTIATE_ADVERTISE_ALL, Snp);
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if (EFI_ERROR(Status)) {
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DEBUG ((EFI_D_WARN, "Lan9118: Auto Negociation not supported.\n"));
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DEBUG ((EFI_D_WARN, "LAN9118: Auto Negotiation failed.\n"));
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}
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// Configure flow control depending on speed capabilities
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@ -431,7 +430,7 @@ SnpReset (
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// Write the current configuration to the register
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MmioWrite32 (LAN9118_PMT_CTRL, PmConf);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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// Reactivate the LEDs
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Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp);
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@ -446,7 +445,7 @@ SnpReset (
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HwConf |= HW_CFG_TX_FIFO_SIZE(gTxBuffer); // assign size chosen in SnpInitialize
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MmioWrite32 (LAN9118_HW_CFG, HwConf); // Write the conf
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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// Enable the receiver and transmitter and clear their contents
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@ -701,7 +700,7 @@ SnpReceiveFilters (
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// Write the options to the MAC_CSR
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//
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IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCSRValue);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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//
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// If we have to retrieve something, start packet reception.
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@ -768,7 +767,7 @@ SnpStationAddress (
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New = (EFI_MAC_ADDRESS *) PermAddr;
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Lan9118SetMacAddress ((EFI_MAC_ADDRESS *) PermAddr, Snp);
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} else {
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DEBUG ((EFI_D_ERROR, "Lan9118: Warning: No valid MAC address in EEPROM, using fallback\n"));
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DEBUG ((EFI_D_ERROR, "LAN9118: Warning: No valid MAC address in EEPROM, using fallback\n"));
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New = (EFI_MAC_ADDRESS*) (FixedPcdGet64 (PcdLan9118DefaultMacAddress));
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}
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} else {
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@ -51,6 +51,7 @@
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[FixedPcd]
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gEmbeddedTokenSpaceGuid.PcdLan9118DxeBaseAddress
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gEmbeddedTokenSpaceGuid.PcdLan9118DefaultMacAddress
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gEmbeddedTokenSpaceGuid.PcdLan9118DefaultNegotiationTimeout
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[Depex]
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TRUE
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@ -236,7 +236,7 @@ IndirectEEPROMRead32 (
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// Write to Eeprom command register
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MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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// Wait until operation has completed
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while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
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@ -284,7 +284,7 @@ IndirectEEPROMWrite32 (
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// Write to Eeprom command register
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MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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// Wait until operation has completed
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while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
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@ -355,31 +355,33 @@ Lan9118Initialize (
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IN EFI_SIMPLE_NETWORK_PROTOCOL *Snp
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)
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{
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UINTN Timeout;
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UINTN Retries;
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UINT64 DefaultMacAddress;
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// Attempt to wake-up the device if it is in a lower power state
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if (((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PM_MODE_MASK) >> 12) != 0) {
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DEBUG ((DEBUG_NET, "Waking from reduced power state.\n"));
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MmioWrite32 (LAN9118_BYTE_TEST, 0xFFFFFFFF);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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// Check that device is active
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Timeout = 20;
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while ((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_READY) == 0 && --Timeout) {
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Retries = 20;
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while ((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_READY) == 0 && --Retries) {
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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if (!Timeout) {
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if (!Retries) {
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return EFI_TIMEOUT;
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}
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// Check that EEPROM isn't active
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Timeout = 20;
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while ((MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY) && --Timeout){
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Retries = 20;
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while ((MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY) && --Retries){
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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if (!Timeout) {
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if (!Retries) {
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return EFI_TIMEOUT;
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}
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@ -447,11 +449,12 @@ SoftReset (
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// Write the configuration
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MmioWrite32 (LAN9118_HW_CFG, HwConf);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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// Wait for reset to complete
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while (MmioRead32 (LAN9118_HW_CFG) & HWCFG_SRST) {
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MemoryFence();
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gBS->Stall (LAN9118_STALL);
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ResetTime += 1;
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@ -500,7 +503,7 @@ PhySoftReset (
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// Wait for completion
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while (MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PHY_RST) {
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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// PHY Basic Control Register reset
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} else if (Flags & PHY_RESET_BCR) {
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@ -508,7 +511,7 @@ PhySoftReset (
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// Wait for completion
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while (IndirectPHYRead32 (PHY_INDEX_BASIC_CTRL) & PHYCR_RESET) {
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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}
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@ -542,7 +545,7 @@ ConfigureHardware (
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// Write the configuration
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MmioWrite32 (LAN9118_GPIO_CFG, GpioConf);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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return EFI_SUCCESS;
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@ -571,7 +574,7 @@ AutoNegotiate (
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UINT32 PhyControl;
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UINT32 PhyStatus;
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UINT32 Features;
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UINT32 TimeOut;
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UINT32 Retries;
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// First check that auto-negotiation is supported
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PhyStatus = IndirectPHYRead32 (PHY_INDEX_BASIC_STATUS);
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@ -583,11 +586,12 @@ AutoNegotiate (
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// Check that link is up first
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if ((PhyStatus & PHYSTS_LINK_STS) == 0) {
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// Wait until it is up or until Time Out
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TimeOut = 2000;
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Retries = FixedPcdGet32 (PcdLan9118DefaultNegotiationTimeout) / LAN9118_STALL;
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while ((IndirectPHYRead32 (PHY_INDEX_BASIC_STATUS) & PHYSTS_LINK_STS) == 0) {
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MemoryFence();
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gBS->Stall (LAN9118_STALL);
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TimeOut--;
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if (!TimeOut) {
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Retries--;
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if (!Retries) {
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DEBUG ((EFI_D_ERROR, "Link timeout in auto-negotiation.\n"));
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return EFI_TIMEOUT;
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}
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@ -671,7 +675,7 @@ StopTx (
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TxCfg = MmioRead32 (LAN9118_TX_CFG);
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TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;
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MmioWrite32 (LAN9118_TX_CFG, TxCfg);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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// Check if already stopped
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@ -690,7 +694,7 @@ StopTx (
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if (TxCfg & TXCFG_TX_ON) {
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TxCfg |= TXCFG_STOP_TX;
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MmioWrite32 (LAN9118_TX_CFG, TxCfg);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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// Wait for Tx to finish transmitting
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while (MmioRead32 (LAN9118_TX_CFG) & TXCFG_STOP_TX);
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@ -725,7 +729,7 @@ StopRx (
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RxCfg = MmioRead32 (LAN9118_RX_CFG);
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RxCfg |= RXCFG_RX_DUMP;
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MmioWrite32 (LAN9118_RX_CFG, RxCfg);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);
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}
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@ -751,28 +755,28 @@ StartTx (
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TxCfg = MmioRead32 (LAN9118_TX_CFG);
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TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;
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MmioWrite32 (LAN9118_TX_CFG, TxCfg);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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// Check if tx was started from MAC and enable if not
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if (Flags & START_TX_MAC) {
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MacCsr = IndirectMACRead32 (INDIRECT_MAC_INDEX_CR);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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if ((MacCsr & MACCR_TX_EN) == 0) {
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MacCsr |= MACCR_TX_EN;
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IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCsr);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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}
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// Check if tx was started from TX_CFG and enable if not
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if (Flags & START_TX_CFG) {
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TxCfg = MmioRead32 (LAN9118_TX_CFG);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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if ((TxCfg & TXCFG_TX_ON) == 0) {
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TxCfg |= TXCFG_TX_ON;
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MmioWrite32 (LAN9118_TX_CFG, TxCfg);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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}
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@ -802,14 +806,14 @@ StartRx (
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RxCfg = MmioRead32 (LAN9118_RX_CFG);
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RxCfg |= RXCFG_RX_DUMP;
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MmioWrite32 (LAN9118_RX_CFG, RxCfg);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);
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}
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MacCsr |= MACCR_RX_EN;
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IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCsr);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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}
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return EFI_SUCCESS;
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@ -999,7 +1003,7 @@ ChangeFifoAllocation (
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HwConf &= ~(0xF0000);
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HwConf |= ((TxFifoOption & 0xF) << 16);
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MmioWrite32 (LAN9118_HW_CFG, HwConf);
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gBS->Stall (LAN9118_STALL);
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MemoryFence();
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return EFI_SUCCESS;
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}
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@ -145,6 +145,7 @@
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# LAN9118 Ethernet Driver PCDs
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gEmbeddedTokenSpaceGuid.PcdLan9118DxeBaseAddress|0x0|UINT32|0x00000025
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gEmbeddedTokenSpaceGuid.PcdLan9118DefaultMacAddress|0x0|UINT64|0x00000026
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gEmbeddedTokenSpaceGuid.PcdLan9118DefaultNegotiationTimeout|4000|UINT32|0x00000027
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#
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# Android FastBoot
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