mirror of https://github.com/acidanthera/audk.git
Merge branch 'master' of https://github.com/tianocore/edk2
This commit is contained in:
commit
62989e0bd2
|
@ -142,7 +142,7 @@ Lan9118DxeEntry (
|
||||||
// Power up the device so we can find the MAC address
|
// Power up the device so we can find the MAC address
|
||||||
Status = Lan9118Initialize (Snp);
|
Status = Lan9118Initialize (Snp);
|
||||||
if (EFI_ERROR (Status)) {
|
if (EFI_ERROR (Status)) {
|
||||||
DEBUG ((EFI_D_ERROR, "Lan9118: Error initialising hardware\n"));
|
DEBUG ((EFI_D_ERROR, "LAN9118: Error initialising hardware\n"));
|
||||||
return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -307,8 +307,7 @@ SnpInitialize (
|
||||||
|
|
||||||
// Write the current configuration to the register
|
// Write the current configuration to the register
|
||||||
MmioWrite32 (LAN9118_PMT_CTRL, PmConf);
|
MmioWrite32 (LAN9118_PMT_CTRL, PmConf);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
gBS->Stall (LAN9118_STALL);
|
|
||||||
|
|
||||||
// Configure GPIO and HW
|
// Configure GPIO and HW
|
||||||
Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp);
|
Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp);
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||||||
|
@ -343,7 +342,7 @@ SnpInitialize (
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||||||
// Do auto-negotiation if supported
|
// Do auto-negotiation if supported
|
||||||
Status = AutoNegotiate (AUTO_NEGOTIATE_ADVERTISE_ALL, Snp);
|
Status = AutoNegotiate (AUTO_NEGOTIATE_ADVERTISE_ALL, Snp);
|
||||||
if (EFI_ERROR(Status)) {
|
if (EFI_ERROR(Status)) {
|
||||||
DEBUG ((EFI_D_WARN, "Lan9118: Auto Negociation not supported.\n"));
|
DEBUG ((EFI_D_WARN, "LAN9118: Auto Negotiation failed.\n"));
|
||||||
}
|
}
|
||||||
|
|
||||||
// Configure flow control depending on speed capabilities
|
// Configure flow control depending on speed capabilities
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||||||
|
@ -431,7 +430,7 @@ SnpReset (
|
||||||
|
|
||||||
// Write the current configuration to the register
|
// Write the current configuration to the register
|
||||||
MmioWrite32 (LAN9118_PMT_CTRL, PmConf);
|
MmioWrite32 (LAN9118_PMT_CTRL, PmConf);
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||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
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||||||
|
|
||||||
// Reactivate the LEDs
|
// Reactivate the LEDs
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||||||
Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp);
|
Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp);
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||||||
|
@ -446,7 +445,7 @@ SnpReset (
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||||||
HwConf |= HW_CFG_TX_FIFO_SIZE(gTxBuffer); // assign size chosen in SnpInitialize
|
HwConf |= HW_CFG_TX_FIFO_SIZE(gTxBuffer); // assign size chosen in SnpInitialize
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||||||
|
|
||||||
MmioWrite32 (LAN9118_HW_CFG, HwConf); // Write the conf
|
MmioWrite32 (LAN9118_HW_CFG, HwConf); // Write the conf
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
}
|
}
|
||||||
|
|
||||||
// Enable the receiver and transmitter and clear their contents
|
// Enable the receiver and transmitter and clear their contents
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||||||
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@ -701,7 +700,7 @@ SnpReceiveFilters (
|
||||||
// Write the options to the MAC_CSR
|
// Write the options to the MAC_CSR
|
||||||
//
|
//
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||||||
IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCSRValue);
|
IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCSRValue);
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||||||
gBS->Stall (LAN9118_STALL);
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MemoryFence();
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||||||
|
|
||||||
//
|
//
|
||||||
// If we have to retrieve something, start packet reception.
|
// If we have to retrieve something, start packet reception.
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||||||
|
@ -768,7 +767,7 @@ SnpStationAddress (
|
||||||
New = (EFI_MAC_ADDRESS *) PermAddr;
|
New = (EFI_MAC_ADDRESS *) PermAddr;
|
||||||
Lan9118SetMacAddress ((EFI_MAC_ADDRESS *) PermAddr, Snp);
|
Lan9118SetMacAddress ((EFI_MAC_ADDRESS *) PermAddr, Snp);
|
||||||
} else {
|
} else {
|
||||||
DEBUG ((EFI_D_ERROR, "Lan9118: Warning: No valid MAC address in EEPROM, using fallback\n"));
|
DEBUG ((EFI_D_ERROR, "LAN9118: Warning: No valid MAC address in EEPROM, using fallback\n"));
|
||||||
New = (EFI_MAC_ADDRESS*) (FixedPcdGet64 (PcdLan9118DefaultMacAddress));
|
New = (EFI_MAC_ADDRESS*) (FixedPcdGet64 (PcdLan9118DefaultMacAddress));
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
|
|
|
@ -51,6 +51,7 @@
|
||||||
[FixedPcd]
|
[FixedPcd]
|
||||||
gEmbeddedTokenSpaceGuid.PcdLan9118DxeBaseAddress
|
gEmbeddedTokenSpaceGuid.PcdLan9118DxeBaseAddress
|
||||||
gEmbeddedTokenSpaceGuid.PcdLan9118DefaultMacAddress
|
gEmbeddedTokenSpaceGuid.PcdLan9118DefaultMacAddress
|
||||||
|
gEmbeddedTokenSpaceGuid.PcdLan9118DefaultNegotiationTimeout
|
||||||
|
|
||||||
[Depex]
|
[Depex]
|
||||||
TRUE
|
TRUE
|
||||||
|
|
|
@ -236,7 +236,7 @@ IndirectEEPROMRead32 (
|
||||||
|
|
||||||
// Write to Eeprom command register
|
// Write to Eeprom command register
|
||||||
MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);
|
MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
|
|
||||||
// Wait until operation has completed
|
// Wait until operation has completed
|
||||||
while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
|
while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
|
||||||
|
@ -284,7 +284,7 @@ IndirectEEPROMWrite32 (
|
||||||
|
|
||||||
// Write to Eeprom command register
|
// Write to Eeprom command register
|
||||||
MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);
|
MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
|
|
||||||
// Wait until operation has completed
|
// Wait until operation has completed
|
||||||
while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
|
while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
|
||||||
|
@ -355,31 +355,33 @@ Lan9118Initialize (
|
||||||
IN EFI_SIMPLE_NETWORK_PROTOCOL *Snp
|
IN EFI_SIMPLE_NETWORK_PROTOCOL *Snp
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
UINTN Timeout;
|
UINTN Retries;
|
||||||
UINT64 DefaultMacAddress;
|
UINT64 DefaultMacAddress;
|
||||||
|
|
||||||
// Attempt to wake-up the device if it is in a lower power state
|
// Attempt to wake-up the device if it is in a lower power state
|
||||||
if (((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PM_MODE_MASK) >> 12) != 0) {
|
if (((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PM_MODE_MASK) >> 12) != 0) {
|
||||||
DEBUG ((DEBUG_NET, "Waking from reduced power state.\n"));
|
DEBUG ((DEBUG_NET, "Waking from reduced power state.\n"));
|
||||||
MmioWrite32 (LAN9118_BYTE_TEST, 0xFFFFFFFF);
|
MmioWrite32 (LAN9118_BYTE_TEST, 0xFFFFFFFF);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
}
|
}
|
||||||
|
|
||||||
// Check that device is active
|
// Check that device is active
|
||||||
Timeout = 20;
|
Retries = 20;
|
||||||
while ((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_READY) == 0 && --Timeout) {
|
while ((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_READY) == 0 && --Retries) {
|
||||||
gBS->Stall (LAN9118_STALL);
|
gBS->Stall (LAN9118_STALL);
|
||||||
|
MemoryFence();
|
||||||
}
|
}
|
||||||
if (!Timeout) {
|
if (!Retries) {
|
||||||
return EFI_TIMEOUT;
|
return EFI_TIMEOUT;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Check that EEPROM isn't active
|
// Check that EEPROM isn't active
|
||||||
Timeout = 20;
|
Retries = 20;
|
||||||
while ((MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY) && --Timeout){
|
while ((MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY) && --Retries){
|
||||||
gBS->Stall (LAN9118_STALL);
|
gBS->Stall (LAN9118_STALL);
|
||||||
|
MemoryFence();
|
||||||
}
|
}
|
||||||
if (!Timeout) {
|
if (!Retries) {
|
||||||
return EFI_TIMEOUT;
|
return EFI_TIMEOUT;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -447,11 +449,12 @@ SoftReset (
|
||||||
|
|
||||||
// Write the configuration
|
// Write the configuration
|
||||||
MmioWrite32 (LAN9118_HW_CFG, HwConf);
|
MmioWrite32 (LAN9118_HW_CFG, HwConf);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
|
|
||||||
// Wait for reset to complete
|
// Wait for reset to complete
|
||||||
while (MmioRead32 (LAN9118_HW_CFG) & HWCFG_SRST) {
|
while (MmioRead32 (LAN9118_HW_CFG) & HWCFG_SRST) {
|
||||||
|
|
||||||
|
MemoryFence();
|
||||||
gBS->Stall (LAN9118_STALL);
|
gBS->Stall (LAN9118_STALL);
|
||||||
ResetTime += 1;
|
ResetTime += 1;
|
||||||
|
|
||||||
|
@ -500,7 +503,7 @@ PhySoftReset (
|
||||||
|
|
||||||
// Wait for completion
|
// Wait for completion
|
||||||
while (MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PHY_RST) {
|
while (MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PHY_RST) {
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
}
|
}
|
||||||
// PHY Basic Control Register reset
|
// PHY Basic Control Register reset
|
||||||
} else if (Flags & PHY_RESET_BCR) {
|
} else if (Flags & PHY_RESET_BCR) {
|
||||||
|
@ -508,7 +511,7 @@ PhySoftReset (
|
||||||
|
|
||||||
// Wait for completion
|
// Wait for completion
|
||||||
while (IndirectPHYRead32 (PHY_INDEX_BASIC_CTRL) & PHYCR_RESET) {
|
while (IndirectPHYRead32 (PHY_INDEX_BASIC_CTRL) & PHYCR_RESET) {
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -542,7 +545,7 @@ ConfigureHardware (
|
||||||
|
|
||||||
// Write the configuration
|
// Write the configuration
|
||||||
MmioWrite32 (LAN9118_GPIO_CFG, GpioConf);
|
MmioWrite32 (LAN9118_GPIO_CFG, GpioConf);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
}
|
}
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
|
@ -571,7 +574,7 @@ AutoNegotiate (
|
||||||
UINT32 PhyControl;
|
UINT32 PhyControl;
|
||||||
UINT32 PhyStatus;
|
UINT32 PhyStatus;
|
||||||
UINT32 Features;
|
UINT32 Features;
|
||||||
UINT32 TimeOut;
|
UINT32 Retries;
|
||||||
|
|
||||||
// First check that auto-negotiation is supported
|
// First check that auto-negotiation is supported
|
||||||
PhyStatus = IndirectPHYRead32 (PHY_INDEX_BASIC_STATUS);
|
PhyStatus = IndirectPHYRead32 (PHY_INDEX_BASIC_STATUS);
|
||||||
|
@ -583,11 +586,12 @@ AutoNegotiate (
|
||||||
// Check that link is up first
|
// Check that link is up first
|
||||||
if ((PhyStatus & PHYSTS_LINK_STS) == 0) {
|
if ((PhyStatus & PHYSTS_LINK_STS) == 0) {
|
||||||
// Wait until it is up or until Time Out
|
// Wait until it is up or until Time Out
|
||||||
TimeOut = 2000;
|
Retries = FixedPcdGet32 (PcdLan9118DefaultNegotiationTimeout) / LAN9118_STALL;
|
||||||
while ((IndirectPHYRead32 (PHY_INDEX_BASIC_STATUS) & PHYSTS_LINK_STS) == 0) {
|
while ((IndirectPHYRead32 (PHY_INDEX_BASIC_STATUS) & PHYSTS_LINK_STS) == 0) {
|
||||||
|
MemoryFence();
|
||||||
gBS->Stall (LAN9118_STALL);
|
gBS->Stall (LAN9118_STALL);
|
||||||
TimeOut--;
|
Retries--;
|
||||||
if (!TimeOut) {
|
if (!Retries) {
|
||||||
DEBUG ((EFI_D_ERROR, "Link timeout in auto-negotiation.\n"));
|
DEBUG ((EFI_D_ERROR, "Link timeout in auto-negotiation.\n"));
|
||||||
return EFI_TIMEOUT;
|
return EFI_TIMEOUT;
|
||||||
}
|
}
|
||||||
|
@ -671,7 +675,7 @@ StopTx (
|
||||||
TxCfg = MmioRead32 (LAN9118_TX_CFG);
|
TxCfg = MmioRead32 (LAN9118_TX_CFG);
|
||||||
TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;
|
TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;
|
||||||
MmioWrite32 (LAN9118_TX_CFG, TxCfg);
|
MmioWrite32 (LAN9118_TX_CFG, TxCfg);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
}
|
}
|
||||||
|
|
||||||
// Check if already stopped
|
// Check if already stopped
|
||||||
|
@ -690,7 +694,7 @@ StopTx (
|
||||||
if (TxCfg & TXCFG_TX_ON) {
|
if (TxCfg & TXCFG_TX_ON) {
|
||||||
TxCfg |= TXCFG_STOP_TX;
|
TxCfg |= TXCFG_STOP_TX;
|
||||||
MmioWrite32 (LAN9118_TX_CFG, TxCfg);
|
MmioWrite32 (LAN9118_TX_CFG, TxCfg);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
|
|
||||||
// Wait for Tx to finish transmitting
|
// Wait for Tx to finish transmitting
|
||||||
while (MmioRead32 (LAN9118_TX_CFG) & TXCFG_STOP_TX);
|
while (MmioRead32 (LAN9118_TX_CFG) & TXCFG_STOP_TX);
|
||||||
|
@ -725,7 +729,7 @@ StopRx (
|
||||||
RxCfg = MmioRead32 (LAN9118_RX_CFG);
|
RxCfg = MmioRead32 (LAN9118_RX_CFG);
|
||||||
RxCfg |= RXCFG_RX_DUMP;
|
RxCfg |= RXCFG_RX_DUMP;
|
||||||
MmioWrite32 (LAN9118_RX_CFG, RxCfg);
|
MmioWrite32 (LAN9118_RX_CFG, RxCfg);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
|
|
||||||
while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);
|
while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);
|
||||||
}
|
}
|
||||||
|
@ -751,28 +755,28 @@ StartTx (
|
||||||
TxCfg = MmioRead32 (LAN9118_TX_CFG);
|
TxCfg = MmioRead32 (LAN9118_TX_CFG);
|
||||||
TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;
|
TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;
|
||||||
MmioWrite32 (LAN9118_TX_CFG, TxCfg);
|
MmioWrite32 (LAN9118_TX_CFG, TxCfg);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
}
|
}
|
||||||
|
|
||||||
// Check if tx was started from MAC and enable if not
|
// Check if tx was started from MAC and enable if not
|
||||||
if (Flags & START_TX_MAC) {
|
if (Flags & START_TX_MAC) {
|
||||||
MacCsr = IndirectMACRead32 (INDIRECT_MAC_INDEX_CR);
|
MacCsr = IndirectMACRead32 (INDIRECT_MAC_INDEX_CR);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
if ((MacCsr & MACCR_TX_EN) == 0) {
|
if ((MacCsr & MACCR_TX_EN) == 0) {
|
||||||
MacCsr |= MACCR_TX_EN;
|
MacCsr |= MACCR_TX_EN;
|
||||||
IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCsr);
|
IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCsr);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Check if tx was started from TX_CFG and enable if not
|
// Check if tx was started from TX_CFG and enable if not
|
||||||
if (Flags & START_TX_CFG) {
|
if (Flags & START_TX_CFG) {
|
||||||
TxCfg = MmioRead32 (LAN9118_TX_CFG);
|
TxCfg = MmioRead32 (LAN9118_TX_CFG);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
if ((TxCfg & TXCFG_TX_ON) == 0) {
|
if ((TxCfg & TXCFG_TX_ON) == 0) {
|
||||||
TxCfg |= TXCFG_TX_ON;
|
TxCfg |= TXCFG_TX_ON;
|
||||||
MmioWrite32 (LAN9118_TX_CFG, TxCfg);
|
MmioWrite32 (LAN9118_TX_CFG, TxCfg);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -802,14 +806,14 @@ StartRx (
|
||||||
RxCfg = MmioRead32 (LAN9118_RX_CFG);
|
RxCfg = MmioRead32 (LAN9118_RX_CFG);
|
||||||
RxCfg |= RXCFG_RX_DUMP;
|
RxCfg |= RXCFG_RX_DUMP;
|
||||||
MmioWrite32 (LAN9118_RX_CFG, RxCfg);
|
MmioWrite32 (LAN9118_RX_CFG, RxCfg);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
|
|
||||||
while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);
|
while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);
|
||||||
}
|
}
|
||||||
|
|
||||||
MacCsr |= MACCR_RX_EN;
|
MacCsr |= MACCR_RX_EN;
|
||||||
IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCsr);
|
IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCsr);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
}
|
}
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
|
@ -999,7 +1003,7 @@ ChangeFifoAllocation (
|
||||||
HwConf &= ~(0xF0000);
|
HwConf &= ~(0xF0000);
|
||||||
HwConf |= ((TxFifoOption & 0xF) << 16);
|
HwConf |= ((TxFifoOption & 0xF) << 16);
|
||||||
MmioWrite32 (LAN9118_HW_CFG, HwConf);
|
MmioWrite32 (LAN9118_HW_CFG, HwConf);
|
||||||
gBS->Stall (LAN9118_STALL);
|
MemoryFence();
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
|
@ -145,6 +145,7 @@
|
||||||
# LAN9118 Ethernet Driver PCDs
|
# LAN9118 Ethernet Driver PCDs
|
||||||
gEmbeddedTokenSpaceGuid.PcdLan9118DxeBaseAddress|0x0|UINT32|0x00000025
|
gEmbeddedTokenSpaceGuid.PcdLan9118DxeBaseAddress|0x0|UINT32|0x00000025
|
||||||
gEmbeddedTokenSpaceGuid.PcdLan9118DefaultMacAddress|0x0|UINT64|0x00000026
|
gEmbeddedTokenSpaceGuid.PcdLan9118DefaultMacAddress|0x0|UINT64|0x00000026
|
||||||
|
gEmbeddedTokenSpaceGuid.PcdLan9118DefaultNegotiationTimeout|4000|UINT32|0x00000027
|
||||||
|
|
||||||
#
|
#
|
||||||
# Android FastBoot
|
# Android FastBoot
|
||||||
|
|
Loading…
Reference in New Issue