ArmPlatformPkg: Add support for PrePi module

This module is enabled for ArmRealViewEb and ArmvExpress builds
when the macro EDK2_SKIP_PEICORE is passed to the build system.

The PrePi module can be used when the DRAM has already been initialized
by the SEC phase/1st stage boot loader and no call to external PEIM is
required.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11953 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2011-07-01 14:33:26 +00:00
parent bf72cf3381
commit 64e03133cc
7 changed files with 99 additions and 20 deletions

View File

@ -136,6 +136,17 @@
# ARM PL390 General Interrupt Driver in Secure and Non-secure
PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
!if $(EDK2_SKIP_PEICORE) == 1
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
!endif
[LibraryClasses.common.PEI_CORE]
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
@ -405,18 +416,25 @@
# SEC
#
ArmPlatformPkg/Sec/Sec.inf
ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
#
# PEI Phase modules
#
!if $(EDK2_SKIP_PEICORE) == 1
ArmPlatformPkg/PrePi/PeiUniCore.inf {
<LibraryClasses>
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf
}
!else
ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
<LibraryClasses>
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
}
ArmPlatformPkg/PlatformPei/PlatformPei.inf
ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
Nt32Pkg/BootModePei/BootModePei.inf
MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
@ -424,6 +442,7 @@
<LibraryClasses>
NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
}
!endif
#
# DXE

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@ -138,6 +138,17 @@
PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
PL390GicNonSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
!if $(EDK2_SKIP_PEICORE) == 1
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
!endif
[LibraryClasses.common.PEI_CORE]
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
@ -415,18 +426,25 @@
# SEC
#
ArmPlatformPkg/Sec/Sec.inf
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
#
# PEI Phase modules
#
!if $(EDK2_SKIP_PEICORE) == 1
ArmPlatformPkg/PrePi/PeiMPCore.inf{
<LibraryClasses>
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLib.inf
ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf
}
!else
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
<LibraryClasses>
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
}
ArmPlatformPkg/PlatformPei/PlatformPei.inf
ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
Nt32Pkg/BootModePei/BootModePei.inf
MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
@ -434,6 +452,7 @@
<LibraryClasses>
NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
}
!endif
#
# DXE

View File

@ -187,22 +187,25 @@ READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
!if $(EDK2_SKIP_PEICORE) == 1
INF ArmPlatformPkg/PrePi/PeiMPCore.inf
!else
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
INF MdeModulePkg/Core/Pei/PeiMain.inf
INF ArmPlatformPkg/PlatformPei/PlatformPei.inf
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
!endif
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
SECTION FV_IMAGE = FVMAIN
}
}
################################################################################
#
# Rules are use with the [FV] section's module INF type to define

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@ -187,22 +187,25 @@ READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
!if $(EDK2_SKIP_PEICORE) == 1
INF ArmPlatformPkg/PrePi/PeiUniCore.inf
!else
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
INF MdeModulePkg/Core/Pei/PeiMain.inf
INF ArmPlatformPkg/PlatformPei/PlatformPei.inf
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
!endif
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
SECTION FV_IMAGE = FVMAIN
}
}
################################################################################
#
# Rules are use with the [FV] section's module INF type to define

View File

@ -148,6 +148,18 @@
# ARM PL390 General Interrupt Driver in Secure and Non-secure
PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
PL390GicNonSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
!if $(EDK2_SKIP_PEICORE) == 1
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
!endif
[LibraryClasses.common.PEI_CORE]
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
@ -377,7 +389,6 @@
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0x48000000 # Top of SEC Stack for Normal World
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0x00020000 # Stack for each of the 4 CPU cores
# System Memory (1GB)
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x60000000
gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000
@ -449,18 +460,25 @@
# SEC
#
ArmPlatformPkg/Sec/Sec.inf
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
#
# PEI Phase modules
#
!if $(EDK2_SKIP_PEICORE) == 1
ArmPlatformPkg/PrePi/PeiMPCore.inf {
<LibraryClasses>
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLib.inf
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
}
!else
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
<LibraryClasses>
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
}
ArmPlatformPkg/PlatformPei/PlatformPei.inf
ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
Nt32Pkg/BootModePei/BootModePei.inf
MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
@ -468,6 +486,7 @@
<LibraryClasses>
NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
}
!endif
#
# DXE

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@ -219,14 +219,18 @@ READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
!if $(EDK2_SKIP_PEICORE) == 1
INF ArmPlatformPkg/PrePi/PeiMPCore.inf
!else
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
INF MdeModulePkg/Core/Pei/PeiMain.inf
INF ArmPlatformPkg/PlatformPei/PlatformPei.inf
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
!endif
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {

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@ -227,6 +227,18 @@ CEntryPoint (
// Enter Secondary Cores into non Secure State. To enter into Non Secure state, we need to make a return from exception
return_from_exception((UINTN)NonSecureWaitForFirmware);
}
} else if (FeaturePcdGet(PcdSkipPeiCore)) {
if (CoreId == ARM_PRIMARY_CORE) {
// Signal the secondary cores they can jump to PEI phase
PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
// To enter into Non Secure state, we need to make a return from exception
return_from_exception(PcdGet32(PcdNormalFvBaseAddress));
} else {
// We wait for the primary core to finish to initialize the System Memory. When we skip PEI Core, we could set the stack in DRAM
// Without this synchronization the secondary cores will complete the SEC before the primary core has finished to intitialize the DRAM.
return_from_exception((UINTN)NonSecureWaitForFirmware);
}
} else {
// To enter into Non Secure state, we need to make a return from exception
return_from_exception(PcdGet32(PcdNormalFvBaseAddress));