DynamicTablesPkg: Move Mem Affinity Info to Arch Common

Move the Memory Affinity Info object from Arm Namespace to the
Arch Common namespace.

Correspondingly also update the following modules to reflect the
changes introduced by the move:
 - SRAT generator
 - ConfigurationManagerObjectParser
 - Dynamic Plat Repo TokenFixer map.

Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
This commit is contained in:
Sami Mujawar 2024-03-11 11:00:57 +00:00 committed by mergify[bot]
parent 11dcf74d42
commit 71b0e9decb
6 changed files with 77 additions and 78 deletions

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@ -31,6 +31,7 @@ typedef enum ArchCommonObjectID {
EArchCommonObjPciConfigSpaceInfo, ///< 8 - PCI Configuration Space Info EArchCommonObjPciConfigSpaceInfo, ///< 8 - PCI Configuration Space Info
EArchCommonObjPciAddressMapInfo, ///< 9 - Pci Address Map Info EArchCommonObjPciAddressMapInfo, ///< 9 - Pci Address Map Info
EArchCommonObjPciInterruptMapInfo, ///< 10 - Pci Interrupt Map Info EArchCommonObjPciInterruptMapInfo, ///< 10 - Pci Interrupt Map Info
EArchCommonObjMemoryAffinityInfo, ///< 11 - Memory Affinity Info
EArchCommonObjMax EArchCommonObjMax
} EARCH_COMMON_OBJECT_ID; } EARCH_COMMON_OBJECT_ID;
@ -223,6 +224,24 @@ typedef struct CmArchCommonPciInterruptMapInfo {
CM_ARCH_COMMON_GENERIC_INTERRUPT IntcInterrupt; CM_ARCH_COMMON_GENERIC_INTERRUPT IntcInterrupt;
} CM_ARCH_COMMON_PCI_INTERRUPT_MAP_INFO; } CM_ARCH_COMMON_PCI_INTERRUPT_MAP_INFO;
/** A structure that describes the Memory Affinity Structure (Type 1) in SRAT
ID: EArchCommonObjMemoryAffinityInfo
*/
typedef struct CmArchCommonMemoryAffinityInfo {
/// The proximity domain to which the "range of memory" belongs.
UINT32 ProximityDomain;
/// Base Address
UINT64 BaseAddress;
/// Length
UINT64 Length;
/// Flags
UINT32 Flags;
} CM_ARCH_COMMON_MEMORY_AFFINITY_INFO;
#pragma pack() #pragma pack()
#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_ #endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_

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@ -50,23 +50,22 @@ typedef enum ArmObjectID {
EArmObjSmmuInterruptArray, ///< 19 - SMMU Interrupt Array EArmObjSmmuInterruptArray, ///< 19 - SMMU Interrupt Array
EArmObjProcHierarchyInfo, ///< 20 - Processor Hierarchy Info EArmObjProcHierarchyInfo, ///< 20 - Processor Hierarchy Info
EArmObjCacheInfo, ///< 21 - Cache Info EArmObjCacheInfo, ///< 21 - Cache Info
EArmObjMemoryAffinityInfo, ///< 22 - Memory Affinity Info EArmObjDeviceHandleAcpi, ///< 22 - Device Handle Acpi
EArmObjDeviceHandleAcpi, ///< 23 - Device Handle Acpi EArmObjDeviceHandlePci, ///< 23 - Device Handle Pci
EArmObjDeviceHandlePci, ///< 24 - Device Handle Pci EArmObjGenericInitiatorAffinityInfo, ///< 24 - Generic Initiator Affinity
EArmObjGenericInitiatorAffinityInfo, ///< 25 - Generic Initiator Affinity EArmObjCmn600Info, ///< 25 - CMN-600 Info
EArmObjCmn600Info, ///< 26 - CMN-600 Info EArmObjLpiInfo, ///< 26 - Lpi Info
EArmObjLpiInfo, ///< 27 - Lpi Info EArmObjRmr, ///< 27 - Reserved Memory Range Node
EArmObjRmr, ///< 28 - Reserved Memory Range Node EArmObjMemoryRangeDescriptor, ///< 28 - Memory Range Descriptor
EArmObjMemoryRangeDescriptor, ///< 29 - Memory Range Descriptor EArmObjCpcInfo, ///< 29 - Continuous Performance Control Info
EArmObjCpcInfo, ///< 30 - Continuous Performance Control Info EArmObjPccSubspaceType0Info, ///< 30 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType0Info, ///< 31 - Pcc Subspace Type 0 Info EArmObjPccSubspaceType1Info, ///< 31 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType1Info, ///< 32 - Pcc Subspace Type 2 Info EArmObjPccSubspaceType2Info, ///< 32 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 33 - Pcc Subspace Type 2 Info EArmObjPccSubspaceType3Info, ///< 33 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType3Info, ///< 34 - Pcc Subspace Type 3 Info EArmObjPccSubspaceType4Info, ///< 34 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType4Info, ///< 35 - Pcc Subspace Type 4 Info EArmObjPccSubspaceType5Info, ///< 35 - Pcc Subspace Type 5 Info
EArmObjPccSubspaceType5Info, ///< 36 - Pcc Subspace Type 5 Info EArmObjEtInfo, ///< 36 - Embedded Trace Extension/Module Info
EArmObjEtInfo, ///< 37 - Embedded Trace Extension/Module Info EArmObjPsdInfo, ///< 37 - P-State Dependency (PSD) Info
EArmObjPsdInfo, ///< 38 - P-State Dependency (PSD) Info
EArmObjMax EArmObjMax
} EARM_OBJECT_ID; } EARM_OBJECT_ID;
@ -721,24 +720,6 @@ typedef struct CmArmCacheInfo {
UINT32 CacheId; UINT32 CacheId;
} CM_ARM_CACHE_INFO; } CM_ARM_CACHE_INFO;
/** A structure that describes the Memory Affinity Structure (Type 1) in SRAT
ID: EArmObjMemoryAffinityInfo
*/
typedef struct CmArmMemoryAffinityInfo {
/// The proximity domain to which the "range of memory" belongs.
UINT32 ProximityDomain;
/// Base Address
UINT64 BaseAddress;
/// Length
UINT64 Length;
/// Flags
UINT32 Flags;
} CM_ARM_MEMORY_AFFINITY_INFO;
/** A structure that describes the ACPI Device Handle (Type 0) in the /** A structure that describes the ACPI Device Handle (Type 0) in the
Generic Initiator Affinity structure in SRAT Generic Initiator Affinity structure in SRAT

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@ -32,7 +32,7 @@
The following Configuration Manager Object(s) are used by this Generator: The following Configuration Manager Object(s) are used by this Generator:
- EArmObjGicCInfo (REQUIRED) - EArmObjGicCInfo (REQUIRED)
- EArmObjGicItsInfo (OPTIONAL) - EArmObjGicItsInfo (OPTIONAL)
- EArmObjMemoryAffinityInfo (OPTIONAL) - EArchCommonObjMemoryAffinityInfo (OPTIONAL)
- EArmObjGenericInitiatorAffinityInfo (OPTIONAL) - EArmObjGenericInitiatorAffinityInfo (OPTIONAL)
- EArmObjDeviceHandleAcpi (OPTIONAL) - EArmObjDeviceHandleAcpi (OPTIONAL)
- EArmObjDeviceHandlePci (OPTIONAL) - EArmObjDeviceHandlePci (OPTIONAL)
@ -62,9 +62,9 @@ GET_OBJECT_LIST (
information from the Configuration Manager. information from the Configuration Manager.
*/ */
GET_OBJECT_LIST ( GET_OBJECT_LIST (
EObjNameSpaceArm, EObjNameSpaceArchCommon,
EArmObjMemoryAffinityInfo, EArchCommonObjMemoryAffinityInfo,
CM_ARM_MEMORY_AFFINITY_INFO CM_ARCH_COMMON_MEMORY_AFFINITY_INFO
); );
/** /**
@ -235,7 +235,7 @@ AddMemoryAffinity (
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol, IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
IN EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *CONST Srat, IN EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *CONST Srat,
IN CONST UINT32 MemAffOffset, IN CONST UINT32 MemAffOffset,
IN CONST CM_ARM_MEMORY_AFFINITY_INFO *MemAffInfo, IN CONST CM_ARCH_COMMON_MEMORY_AFFINITY_INFO *MemAffInfo,
IN UINT32 MemAffCount IN UINT32 MemAffCount
) )
{ {
@ -467,7 +467,7 @@ BuildSratTable (
CM_ARM_GICC_INFO *GicCInfo; CM_ARM_GICC_INFO *GicCInfo;
CM_ARM_GIC_ITS_INFO *GicItsInfo; CM_ARM_GIC_ITS_INFO *GicItsInfo;
CM_ARM_MEMORY_AFFINITY_INFO *MemAffInfo; CM_ARCH_COMMON_MEMORY_AFFINITY_INFO *MemAffInfo;
CM_ARM_GENERIC_INITIATOR_AFFINITY_INFO *GenInitiatorAffInfo; CM_ARM_GENERIC_INITIATOR_AFFINITY_INFO *GenInitiatorAffInfo;
EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *Srat; EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *Srat;
@ -537,7 +537,7 @@ BuildSratTable (
goto error_handler; goto error_handler;
} }
Status = GetEArmObjMemoryAffinityInfo ( Status = GetEArchCommonObjMemoryAffinityInfo (
CfgMgrProtocol, CfgMgrProtocol,
CM_NULL_TOKEN, CM_NULL_TOKEN,
&MemAffInfo, &MemAffInfo,

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@ -165,23 +165,22 @@ CM_OBJECT_TOKEN_FIXER TokenFixer[EArmObjMax] = {
NULL, ///< 19 - SMMU Interrupt Array NULL, ///< 19 - SMMU Interrupt Array
TokenFixerNotImplemented, ///< 20 - Processor Hierarchy Info TokenFixerNotImplemented, ///< 20 - Processor Hierarchy Info
TokenFixerNotImplemented, ///< 21 - Cache Info TokenFixerNotImplemented, ///< 21 - Cache Info
NULL, ///< 22 - Memory Affinity Info NULL, ///< 22 - Device Handle Acpi
NULL, ///< 23 - Device Handle Acpi NULL, ///< 23 - Device Handle Pci
NULL, ///< 24 - Device Handle Pci NULL, ///< 24 - Generic Initiator Affinity
NULL, ///< 25 - Generic Initiator Affinity NULL, ///< 25 - CMN-600 Info
NULL, ///< 26 - CMN-600 Info NULL, ///< 26 - Lpi Info
NULL, ///< 27 - Lpi Info NULL, ///< 27 - Reserved Memory Range Node
NULL, ///< 28 - Reserved Memory Range Node NULL, ///< 28 - Memory Range Descriptor
NULL, ///< 29 - Memory Range Descriptor NULL, ///< 29 - Continuous Performance Control Info
NULL, ///< 30 - Continuous Performance Control Info NULL, ///< 30 - Pcc Subspace Type 0 Info
NULL, ///< 31 - Pcc Subspace Type 0 Info NULL, ///< 31 - Pcc Subspace Type 2 Info
NULL, ///< 32 - Pcc Subspace Type 2 Info NULL, ///< 32 - Pcc Subspace Type 2 Info
NULL, ///< 33 - Pcc Subspace Type 2 Info NULL, ///< 33 - Pcc Subspace Type 3 Info
NULL, ///< 34 - Pcc Subspace Type 3 Info NULL, ///< 34 - Pcc Subspace Type 4 Info
NULL, ///< 35 - Pcc Subspace Type 4 Info NULL, ///< 35 - Pcc Subspace Type 5 Info
NULL, ///< 36 - Pcc Subspace Type 5 Info NULL, ///< 36 - Embedded Trace Extension/Module Info
NULL, ///< 37 - Embedded Trace Extension/Module Info NULL ///< 37 - P-State Dependency (PSD) Info
NULL ///< 38 - P-State Dependency (PSD) Info
}; };
/** CmObj token fixer. /** CmObj token fixer.

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@ -356,9 +356,9 @@ STATIC CONST CM_OBJ_PARSER CmArchCommonObjRefParser[] = {
{ "ReferenceToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL } { "ReferenceToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL }
}; };
/** A parser for EArmObjMemoryAffinityInfo. /** A parser for EArchCommonObjMemoryAffinityInfo.
*/ */
STATIC CONST CM_OBJ_PARSER CmArmMemoryAffinityInfoParser[] = { STATIC CONST CM_OBJ_PARSER CmArchCommonMemoryAffinityInfoParser[] = {
{ "ProximityDomain", 4, "0x%x", NULL }, { "ProximityDomain", 4, "0x%x", NULL },
{ "BaseAddress", 8, "0x%llx", NULL }, { "BaseAddress", 8, "0x%llx", NULL },
{ "Length", 8, "0x%llx", NULL }, { "Length", 8, "0x%llx", NULL },
@ -681,6 +681,7 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArchCommonNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArchCommonObjPciConfigSpaceInfo, CmArchCommonPciConfigSpaceInfoParser), CM_PARSER_ADD_OBJECT (EArchCommonObjPciConfigSpaceInfo, CmArchCommonPciConfigSpaceInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjPciAddressMapInfo, CmArchCommonPciAddressMapInfoParser), CM_PARSER_ADD_OBJECT (EArchCommonObjPciAddressMapInfo, CmArchCommonPciAddressMapInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjPciInterruptMapInfo, CmArchCommonPciInterruptMapInfoParser), CM_PARSER_ADD_OBJECT (EArchCommonObjPciInterruptMapInfo, CmArchCommonPciInterruptMapInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjMemoryAffinityInfo, CmArchCommonMemoryAffinityInfoParser),
CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax) CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax)
}; };
@ -709,7 +710,6 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArmObjSmmuInterruptArray, CmArchCommonGenericInterruptParser), CM_PARSER_ADD_OBJECT (EArmObjSmmuInterruptArray, CmArchCommonGenericInterruptParser),
CM_PARSER_ADD_OBJECT (EArmObjProcHierarchyInfo, CmArmProcHierarchyInfoParser), CM_PARSER_ADD_OBJECT (EArmObjProcHierarchyInfo, CmArmProcHierarchyInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjCacheInfo, CmArmCacheInfoParser), CM_PARSER_ADD_OBJECT (EArmObjCacheInfo, CmArmCacheInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjMemoryAffinityInfo, CmArmMemoryAffinityInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjDeviceHandleAcpi, CmArmDeviceHandleAcpiParser), CM_PARSER_ADD_OBJECT (EArmObjDeviceHandleAcpi, CmArmDeviceHandleAcpiParser),
CM_PARSER_ADD_OBJECT (EArmObjDeviceHandlePci, CmArmDeviceHandlePciParser), CM_PARSER_ADD_OBJECT (EArmObjDeviceHandlePci, CmArmDeviceHandlePciParser),
CM_PARSER_ADD_OBJECT (EArmObjGenericInitiatorAffinityInfo,CmArmGenericInitiatorAffinityInfoParser), CM_PARSER_ADD_OBJECT (EArmObjGenericInitiatorAffinityInfo,CmArmGenericInitiatorAffinityInfoParser),

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@ -462,23 +462,22 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 19 | SMMU Interrupt Array | | | 19 | SMMU Interrupt Array | |
| 20 | Processor Hierarchy Info | Move to Arch Common NS | | 20 | Processor Hierarchy Info | Move to Arch Common NS |
| 21 | Cache Info | Move to Arch Common NS | | 21 | Cache Info | Move to Arch Common NS |
| 22 | Memory Affinity Info | Move to Arch Common NS | | 22 | Device Handle Acpi | Move to Arch Common NS |
| 23 | Device Handle Acpi | Move to Arch Common NS | | 23 | Device Handle PCI | Move to Arch Common NS |
| 24 | Device Handle PCI | Move to Arch Common NS | | 24 | Generic Initiator Affinity Info | Move to Arch Common NS |
| 25 | Generic Initiator Affinity Info | Move to Arch Common NS | | 25 | CMN 600 Info | |
| 26 | CMN 600 Info | | | 26 | Low Power Idle State Info | Move to Arch Common NS |
| 27 | Low Power Idle State Info | Move to Arch Common NS | | 27 | Reserved Memory Range Node | |
| 28 | Reserved Memory Range Node | | | 28 | Memory Range Descriptor | |
| 29 | Memory Range Descriptor | | | 29 | Continuous Performance Control Info | Move to Arch Common NS |
| 30 | Continuous Performance Control Info | Move to Arch Common NS | | 30 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 31 | Pcc Subspace Type 0 Info | Move to Arch Common NS | | 31 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 32 | Pcc Subspace Type 1 Info | Move to Arch Common NS | | 32 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 33 | Pcc Subspace Type 2 Info | Move to Arch Common NS | | 33 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 34 | Pcc Subspace Type 3 Info | Move to Arch Common NS | | 34 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 35 | Pcc Subspace Type 4 Info | Move to Arch Common NS | | 35 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 36 | Pcc Subspace Type 5 Info | Move to Arch Common NS | | 36 | Embedded Trace Extension/Module Info | |
| 37 | Embedded Trace Extension/Module Info | | | 37 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| 38 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| `*` | All other values are reserved. | | | `*` | All other values are reserved. | |
#### Object ID's in the Arch Common Namespace: #### Object ID's in the Arch Common Namespace:
@ -496,4 +495,5 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 8 | PCI Configuration Space Info | | | 8 | PCI Configuration Space Info | |
| 9 | PCI Address Map Info | | | 9 | PCI Address Map Info | |
| 10 | PCI Interrupt Map Info | | | 10 | PCI Interrupt Map Info | |
| 11 | Memory Affinity Info | |
| `*` | All other values are reserved. | | | `*` | All other values are reserved. | |