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DynamicTablesPkg: Move Mem Affinity Info to Arch Common
Move the Memory Affinity Info object from Arm Namespace to the Arch Common namespace. Correspondingly also update the following modules to reflect the changes introduced by the move: - SRAT generator - ConfigurationManagerObjectParser - Dynamic Plat Repo TokenFixer map. Cc: Pierre Gondois <Pierre.Gondois@arm.com> Cc: Yeo Reum Yun <YeoReum.Yun@arm.com> Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com> Cc: Jeshua Smith <jeshuas@nvidia.com> Cc: Jeff Brasen <jbrasen@nvidia.com> Cc: Girish Mahadevan <gmahadevan@nvidia.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
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@ -31,6 +31,7 @@ typedef enum ArchCommonObjectID {
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EArchCommonObjPciConfigSpaceInfo, ///< 8 - PCI Configuration Space Info
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EArchCommonObjPciConfigSpaceInfo, ///< 8 - PCI Configuration Space Info
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EArchCommonObjPciAddressMapInfo, ///< 9 - Pci Address Map Info
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EArchCommonObjPciAddressMapInfo, ///< 9 - Pci Address Map Info
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EArchCommonObjPciInterruptMapInfo, ///< 10 - Pci Interrupt Map Info
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EArchCommonObjPciInterruptMapInfo, ///< 10 - Pci Interrupt Map Info
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EArchCommonObjMemoryAffinityInfo, ///< 11 - Memory Affinity Info
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EArchCommonObjMax
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EArchCommonObjMax
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} EARCH_COMMON_OBJECT_ID;
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} EARCH_COMMON_OBJECT_ID;
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@ -223,6 +224,24 @@ typedef struct CmArchCommonPciInterruptMapInfo {
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CM_ARCH_COMMON_GENERIC_INTERRUPT IntcInterrupt;
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CM_ARCH_COMMON_GENERIC_INTERRUPT IntcInterrupt;
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} CM_ARCH_COMMON_PCI_INTERRUPT_MAP_INFO;
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} CM_ARCH_COMMON_PCI_INTERRUPT_MAP_INFO;
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/** A structure that describes the Memory Affinity Structure (Type 1) in SRAT
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ID: EArchCommonObjMemoryAffinityInfo
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*/
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typedef struct CmArchCommonMemoryAffinityInfo {
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/// The proximity domain to which the "range of memory" belongs.
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UINT32 ProximityDomain;
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/// Base Address
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UINT64 BaseAddress;
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/// Length
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UINT64 Length;
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/// Flags
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UINT32 Flags;
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} CM_ARCH_COMMON_MEMORY_AFFINITY_INFO;
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#pragma pack()
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#pragma pack()
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#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_
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#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_
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@ -50,23 +50,22 @@ typedef enum ArmObjectID {
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EArmObjSmmuInterruptArray, ///< 19 - SMMU Interrupt Array
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EArmObjSmmuInterruptArray, ///< 19 - SMMU Interrupt Array
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EArmObjProcHierarchyInfo, ///< 20 - Processor Hierarchy Info
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EArmObjProcHierarchyInfo, ///< 20 - Processor Hierarchy Info
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EArmObjCacheInfo, ///< 21 - Cache Info
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EArmObjCacheInfo, ///< 21 - Cache Info
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EArmObjMemoryAffinityInfo, ///< 22 - Memory Affinity Info
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EArmObjDeviceHandleAcpi, ///< 22 - Device Handle Acpi
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EArmObjDeviceHandleAcpi, ///< 23 - Device Handle Acpi
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EArmObjDeviceHandlePci, ///< 23 - Device Handle Pci
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EArmObjDeviceHandlePci, ///< 24 - Device Handle Pci
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EArmObjGenericInitiatorAffinityInfo, ///< 24 - Generic Initiator Affinity
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EArmObjGenericInitiatorAffinityInfo, ///< 25 - Generic Initiator Affinity
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EArmObjCmn600Info, ///< 25 - CMN-600 Info
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EArmObjCmn600Info, ///< 26 - CMN-600 Info
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EArmObjLpiInfo, ///< 26 - Lpi Info
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EArmObjLpiInfo, ///< 27 - Lpi Info
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EArmObjRmr, ///< 27 - Reserved Memory Range Node
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EArmObjRmr, ///< 28 - Reserved Memory Range Node
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EArmObjMemoryRangeDescriptor, ///< 28 - Memory Range Descriptor
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EArmObjMemoryRangeDescriptor, ///< 29 - Memory Range Descriptor
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EArmObjCpcInfo, ///< 29 - Continuous Performance Control Info
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EArmObjCpcInfo, ///< 30 - Continuous Performance Control Info
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EArmObjPccSubspaceType0Info, ///< 30 - Pcc Subspace Type 0 Info
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EArmObjPccSubspaceType0Info, ///< 31 - Pcc Subspace Type 0 Info
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EArmObjPccSubspaceType1Info, ///< 31 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType1Info, ///< 32 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType2Info, ///< 32 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType2Info, ///< 33 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType3Info, ///< 33 - Pcc Subspace Type 3 Info
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EArmObjPccSubspaceType3Info, ///< 34 - Pcc Subspace Type 3 Info
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EArmObjPccSubspaceType4Info, ///< 34 - Pcc Subspace Type 4 Info
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EArmObjPccSubspaceType4Info, ///< 35 - Pcc Subspace Type 4 Info
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EArmObjPccSubspaceType5Info, ///< 35 - Pcc Subspace Type 5 Info
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EArmObjPccSubspaceType5Info, ///< 36 - Pcc Subspace Type 5 Info
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EArmObjEtInfo, ///< 36 - Embedded Trace Extension/Module Info
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EArmObjEtInfo, ///< 37 - Embedded Trace Extension/Module Info
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EArmObjPsdInfo, ///< 37 - P-State Dependency (PSD) Info
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EArmObjPsdInfo, ///< 38 - P-State Dependency (PSD) Info
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EArmObjMax
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EArmObjMax
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} EARM_OBJECT_ID;
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} EARM_OBJECT_ID;
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@ -721,24 +720,6 @@ typedef struct CmArmCacheInfo {
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UINT32 CacheId;
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UINT32 CacheId;
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} CM_ARM_CACHE_INFO;
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} CM_ARM_CACHE_INFO;
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/** A structure that describes the Memory Affinity Structure (Type 1) in SRAT
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ID: EArmObjMemoryAffinityInfo
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*/
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typedef struct CmArmMemoryAffinityInfo {
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/// The proximity domain to which the "range of memory" belongs.
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UINT32 ProximityDomain;
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/// Base Address
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UINT64 BaseAddress;
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/// Length
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UINT64 Length;
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/// Flags
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UINT32 Flags;
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} CM_ARM_MEMORY_AFFINITY_INFO;
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/** A structure that describes the ACPI Device Handle (Type 0) in the
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/** A structure that describes the ACPI Device Handle (Type 0) in the
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Generic Initiator Affinity structure in SRAT
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Generic Initiator Affinity structure in SRAT
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@ -32,7 +32,7 @@
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The following Configuration Manager Object(s) are used by this Generator:
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The following Configuration Manager Object(s) are used by this Generator:
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- EArmObjGicCInfo (REQUIRED)
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- EArmObjGicCInfo (REQUIRED)
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- EArmObjGicItsInfo (OPTIONAL)
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- EArmObjGicItsInfo (OPTIONAL)
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- EArmObjMemoryAffinityInfo (OPTIONAL)
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- EArchCommonObjMemoryAffinityInfo (OPTIONAL)
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- EArmObjGenericInitiatorAffinityInfo (OPTIONAL)
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- EArmObjGenericInitiatorAffinityInfo (OPTIONAL)
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- EArmObjDeviceHandleAcpi (OPTIONAL)
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- EArmObjDeviceHandleAcpi (OPTIONAL)
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- EArmObjDeviceHandlePci (OPTIONAL)
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- EArmObjDeviceHandlePci (OPTIONAL)
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@ -62,9 +62,9 @@ GET_OBJECT_LIST (
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information from the Configuration Manager.
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information from the Configuration Manager.
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*/
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*/
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GET_OBJECT_LIST (
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GET_OBJECT_LIST (
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EObjNameSpaceArm,
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EObjNameSpaceArchCommon,
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EArmObjMemoryAffinityInfo,
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EArchCommonObjMemoryAffinityInfo,
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CM_ARM_MEMORY_AFFINITY_INFO
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CM_ARCH_COMMON_MEMORY_AFFINITY_INFO
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);
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);
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/**
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/**
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@ -235,7 +235,7 @@ AddMemoryAffinity (
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IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
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IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
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IN EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *CONST Srat,
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IN EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *CONST Srat,
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IN CONST UINT32 MemAffOffset,
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IN CONST UINT32 MemAffOffset,
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IN CONST CM_ARM_MEMORY_AFFINITY_INFO *MemAffInfo,
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IN CONST CM_ARCH_COMMON_MEMORY_AFFINITY_INFO *MemAffInfo,
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IN UINT32 MemAffCount
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IN UINT32 MemAffCount
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)
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)
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{
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{
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@ -467,7 +467,7 @@ BuildSratTable (
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CM_ARM_GICC_INFO *GicCInfo;
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CM_ARM_GICC_INFO *GicCInfo;
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CM_ARM_GIC_ITS_INFO *GicItsInfo;
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CM_ARM_GIC_ITS_INFO *GicItsInfo;
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CM_ARM_MEMORY_AFFINITY_INFO *MemAffInfo;
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CM_ARCH_COMMON_MEMORY_AFFINITY_INFO *MemAffInfo;
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CM_ARM_GENERIC_INITIATOR_AFFINITY_INFO *GenInitiatorAffInfo;
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CM_ARM_GENERIC_INITIATOR_AFFINITY_INFO *GenInitiatorAffInfo;
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EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *Srat;
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EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *Srat;
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@ -537,7 +537,7 @@ BuildSratTable (
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goto error_handler;
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goto error_handler;
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}
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}
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Status = GetEArmObjMemoryAffinityInfo (
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Status = GetEArchCommonObjMemoryAffinityInfo (
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CfgMgrProtocol,
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CfgMgrProtocol,
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CM_NULL_TOKEN,
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CM_NULL_TOKEN,
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&MemAffInfo,
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&MemAffInfo,
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@ -165,23 +165,22 @@ CM_OBJECT_TOKEN_FIXER TokenFixer[EArmObjMax] = {
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NULL, ///< 19 - SMMU Interrupt Array
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NULL, ///< 19 - SMMU Interrupt Array
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TokenFixerNotImplemented, ///< 20 - Processor Hierarchy Info
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TokenFixerNotImplemented, ///< 20 - Processor Hierarchy Info
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TokenFixerNotImplemented, ///< 21 - Cache Info
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TokenFixerNotImplemented, ///< 21 - Cache Info
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NULL, ///< 22 - Memory Affinity Info
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NULL, ///< 22 - Device Handle Acpi
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NULL, ///< 23 - Device Handle Acpi
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NULL, ///< 23 - Device Handle Pci
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NULL, ///< 24 - Device Handle Pci
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NULL, ///< 24 - Generic Initiator Affinity
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NULL, ///< 25 - Generic Initiator Affinity
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NULL, ///< 25 - CMN-600 Info
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NULL, ///< 26 - CMN-600 Info
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NULL, ///< 26 - Lpi Info
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NULL, ///< 27 - Lpi Info
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NULL, ///< 27 - Reserved Memory Range Node
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NULL, ///< 28 - Reserved Memory Range Node
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NULL, ///< 28 - Memory Range Descriptor
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NULL, ///< 29 - Memory Range Descriptor
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NULL, ///< 29 - Continuous Performance Control Info
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NULL, ///< 30 - Continuous Performance Control Info
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NULL, ///< 30 - Pcc Subspace Type 0 Info
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NULL, ///< 31 - Pcc Subspace Type 0 Info
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NULL, ///< 31 - Pcc Subspace Type 2 Info
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NULL, ///< 32 - Pcc Subspace Type 2 Info
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NULL, ///< 32 - Pcc Subspace Type 2 Info
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NULL, ///< 33 - Pcc Subspace Type 2 Info
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NULL, ///< 33 - Pcc Subspace Type 3 Info
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NULL, ///< 34 - Pcc Subspace Type 3 Info
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NULL, ///< 34 - Pcc Subspace Type 4 Info
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NULL, ///< 35 - Pcc Subspace Type 4 Info
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NULL, ///< 35 - Pcc Subspace Type 5 Info
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NULL, ///< 36 - Pcc Subspace Type 5 Info
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NULL, ///< 36 - Embedded Trace Extension/Module Info
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NULL, ///< 37 - Embedded Trace Extension/Module Info
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NULL ///< 37 - P-State Dependency (PSD) Info
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NULL ///< 38 - P-State Dependency (PSD) Info
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};
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};
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/** CmObj token fixer.
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/** CmObj token fixer.
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@ -356,9 +356,9 @@ STATIC CONST CM_OBJ_PARSER CmArchCommonObjRefParser[] = {
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{ "ReferenceToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL }
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{ "ReferenceToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL }
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};
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};
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/** A parser for EArmObjMemoryAffinityInfo.
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/** A parser for EArchCommonObjMemoryAffinityInfo.
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*/
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*/
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STATIC CONST CM_OBJ_PARSER CmArmMemoryAffinityInfoParser[] = {
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STATIC CONST CM_OBJ_PARSER CmArchCommonMemoryAffinityInfoParser[] = {
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{ "ProximityDomain", 4, "0x%x", NULL },
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{ "ProximityDomain", 4, "0x%x", NULL },
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{ "BaseAddress", 8, "0x%llx", NULL },
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{ "BaseAddress", 8, "0x%llx", NULL },
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{ "Length", 8, "0x%llx", NULL },
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{ "Length", 8, "0x%llx", NULL },
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@ -681,6 +681,7 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArchCommonNamespaceObjectParser[] = {
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CM_PARSER_ADD_OBJECT (EArchCommonObjPciConfigSpaceInfo, CmArchCommonPciConfigSpaceInfoParser),
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CM_PARSER_ADD_OBJECT (EArchCommonObjPciConfigSpaceInfo, CmArchCommonPciConfigSpaceInfoParser),
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CM_PARSER_ADD_OBJECT (EArchCommonObjPciAddressMapInfo, CmArchCommonPciAddressMapInfoParser),
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CM_PARSER_ADD_OBJECT (EArchCommonObjPciAddressMapInfo, CmArchCommonPciAddressMapInfoParser),
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CM_PARSER_ADD_OBJECT (EArchCommonObjPciInterruptMapInfo, CmArchCommonPciInterruptMapInfoParser),
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CM_PARSER_ADD_OBJECT (EArchCommonObjPciInterruptMapInfo, CmArchCommonPciInterruptMapInfoParser),
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CM_PARSER_ADD_OBJECT (EArchCommonObjMemoryAffinityInfo, CmArchCommonMemoryAffinityInfoParser),
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CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax)
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CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax)
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};
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};
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@ -709,7 +710,6 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
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CM_PARSER_ADD_OBJECT (EArmObjSmmuInterruptArray, CmArchCommonGenericInterruptParser),
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CM_PARSER_ADD_OBJECT (EArmObjSmmuInterruptArray, CmArchCommonGenericInterruptParser),
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CM_PARSER_ADD_OBJECT (EArmObjProcHierarchyInfo, CmArmProcHierarchyInfoParser),
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CM_PARSER_ADD_OBJECT (EArmObjProcHierarchyInfo, CmArmProcHierarchyInfoParser),
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CM_PARSER_ADD_OBJECT (EArmObjCacheInfo, CmArmCacheInfoParser),
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CM_PARSER_ADD_OBJECT (EArmObjCacheInfo, CmArmCacheInfoParser),
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CM_PARSER_ADD_OBJECT (EArmObjMemoryAffinityInfo, CmArmMemoryAffinityInfoParser),
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CM_PARSER_ADD_OBJECT (EArmObjDeviceHandleAcpi, CmArmDeviceHandleAcpiParser),
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CM_PARSER_ADD_OBJECT (EArmObjDeviceHandleAcpi, CmArmDeviceHandleAcpiParser),
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CM_PARSER_ADD_OBJECT (EArmObjDeviceHandlePci, CmArmDeviceHandlePciParser),
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CM_PARSER_ADD_OBJECT (EArmObjDeviceHandlePci, CmArmDeviceHandlePciParser),
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CM_PARSER_ADD_OBJECT (EArmObjGenericInitiatorAffinityInfo,CmArmGenericInitiatorAffinityInfoParser),
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CM_PARSER_ADD_OBJECT (EArmObjGenericInitiatorAffinityInfo,CmArmGenericInitiatorAffinityInfoParser),
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@ -462,23 +462,22 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
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| 19 | SMMU Interrupt Array | |
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| 19 | SMMU Interrupt Array | |
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| 20 | Processor Hierarchy Info | Move to Arch Common NS |
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| 20 | Processor Hierarchy Info | Move to Arch Common NS |
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| 21 | Cache Info | Move to Arch Common NS |
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| 21 | Cache Info | Move to Arch Common NS |
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| 22 | Memory Affinity Info | Move to Arch Common NS |
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| 22 | Device Handle Acpi | Move to Arch Common NS |
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| 23 | Device Handle Acpi | Move to Arch Common NS |
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| 23 | Device Handle PCI | Move to Arch Common NS |
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| 24 | Device Handle PCI | Move to Arch Common NS |
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| 24 | Generic Initiator Affinity Info | Move to Arch Common NS |
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| 25 | Generic Initiator Affinity Info | Move to Arch Common NS |
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| 25 | CMN 600 Info | |
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| 26 | CMN 600 Info | |
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| 26 | Low Power Idle State Info | Move to Arch Common NS |
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| 27 | Low Power Idle State Info | Move to Arch Common NS |
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| 27 | Reserved Memory Range Node | |
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| 28 | Reserved Memory Range Node | |
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| 28 | Memory Range Descriptor | |
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| 29 | Memory Range Descriptor | |
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| 29 | Continuous Performance Control Info | Move to Arch Common NS |
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| 30 | Continuous Performance Control Info | Move to Arch Common NS |
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| 30 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
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| 31 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
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| 31 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
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| 32 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
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| 32 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
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| 33 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
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| 33 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
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| 34 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
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| 34 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
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| 35 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
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| 35 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
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| 36 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
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| 36 | Embedded Trace Extension/Module Info | |
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| 37 | Embedded Trace Extension/Module Info | |
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| 37 | P-State Dependency (PSD) Info | Move to Arch Common NS |
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| 38 | P-State Dependency (PSD) Info | Move to Arch Common NS |
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| `*` | All other values are reserved. | |
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| `*` | All other values are reserved. | |
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#### Object ID's in the Arch Common Namespace:
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#### Object ID's in the Arch Common Namespace:
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@ -496,4 +495,5 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
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| 8 | PCI Configuration Space Info | |
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| 8 | PCI Configuration Space Info | |
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| 9 | PCI Address Map Info | |
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| 9 | PCI Address Map Info | |
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| 10 | PCI Interrupt Map Info | |
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| 10 | PCI Interrupt Map Info | |
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| 11 | Memory Affinity Info | |
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| `*` | All other values are reserved. | |
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| `*` | All other values are reserved. | |
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