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ArmPkg/ArmMmuLib AARCH64: invalidate page tables before populating them 

As it turns out, ARMv8 also permits accesses made with the MMU and
caches off to hit in the caches, so to ensure that any modifications
we make before enabling the MMU are visible afterwards as well, we
should invalidate page tables right after allocation like we do now on
ARM, if the MMU is still disabled at that point.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Message-Id: <20200307083849.8940-3-ard.biesheuvel@linaro.org>
This commit is contained in:
Ard Biesheuvel 2020-03-07 09:38:49 +01:00 committed by mergify[bot]
parent 191fa79bce
commit 748fea6279
1 changed files with 14 additions and 0 deletions
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14
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
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@ -204,6 +204,14 @@ UpdateRegionMappingRecursive (
return EFI_OUT_OF_RESOURCES;
}
if (!ArmMmuEnabled ()) {
//
// Make sure we are not inadvertently hitting in the caches
// when populating the page tables.
//
InvalidateDataCacheRange (TranslationTable, EFI_PAGE_SIZE);
}
if ((*Entry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) {
//
// We are splitting an existing block entry, so we have to populate
@ -602,6 +610,12 @@ ArmConfigureMmu (
*TranslationTableSize = RootTableEntryCount * sizeof(UINT64);
}
//
// Make sure we are not inadvertently hitting in the caches
// when populating the page tables.
//
InvalidateDataCacheRange (TranslationTable,
RootTableEntryCount * sizeof(UINT64));
ZeroMem (TranslationTable, RootTableEntryCount * sizeof(UINT64));
TranslationTableAttribute = TT_ATTR_INDX_INVALID;