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MdePkg BaseLib: Convert Ia32/LShiftU64.asm to NASM 

The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/LShiftU64.asm to Ia32/LShiftU64.nasm

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Jordan Justen 2016-05-30 18:51:58 -07:00 committed by Liming Gao
parent f8b4c87cae
commit 76a7787865
2 changed files with 47 additions and 0 deletions
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2
MdePkg/Library/BaseLib/BaseLib.inf
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@ -301,6 +301,7 @@
Ia32/MultU64x64.asm | INTEL
Ia32/MultU64x32.nasm| INTEL
Ia32/MultU64x32.asm | INTEL
Ia32/LShiftU64.nasm| INTEL
Ia32/LShiftU64.asm | INTEL
Ia32/LRotU64.asm | INTEL
Ia32/LongJump.asm | INTEL
@ -366,6 +367,7 @@
Ia32/ARShiftU64.S | GCC
Ia32/RShiftU64.nasm| GCC
Ia32/RShiftU64.S | GCC
Ia32/LShiftU64.nasm| GCC
Ia32/LShiftU64.S | GCC
Ia32/EnableCache.S | GCC
Ia32/DisableCache.S | GCC

45
MdePkg/Library/BaseLib/Ia32/LShiftU64.nasm Normal file
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@ -0,0 +1,45 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; LShiftU64.nasm
;
; Abstract:
;
; 64-bit left shift function for IA-32
;
;------------------------------------------------------------------------------
SECTION .text
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; InternalMathLShiftU64 (
; IN UINT64 Operand,
; IN UINTN Count
; );
;------------------------------------------------------------------------------
global ASM_PFX(InternalMathLShiftU64)
ASM_PFX(InternalMathLShiftU64):
mov cl, [esp + 12]
xor eax, eax
mov edx, [esp + 4]
test cl, 32 ; Count >= 32?
jnz .0
mov eax, edx
mov edx, [esp + 8]
.0:
shld edx, eax, cl
shl eax, cl
ret