mirror of https://github.com/acidanthera/audk.git
Change SMM CPU I/O to SMM CPU I/O 2
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9735 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
f659880bfa
commit
8fc71decbe
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@ -2,7 +2,7 @@
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Common definitions in the Platform Initialization Specification version 1.2
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Common definitions in the Platform Initialization Specification version 1.2
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VOLUME 4 System Management Mode Core Interface version.
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VOLUME 4 System Management Mode Core Interface version.
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Copyright (c) 2009, Intel Corporation
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Copyright (c) 2009 - 2010, Intel Corporation
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All rights reserved. This program and the accompanying materials
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -17,7 +17,7 @@
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#define _PI_SMMCIS_H_
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#define _PI_SMMCIS_H_
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#include <Pi/PiMultiPhase.h>
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#include <Pi/PiMultiPhase.h>
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#include <Protocol/SmmCpuIo.h>
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#include <Protocol/SmmCpuIo2.h>
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///
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///
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/// Note:
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/// Note:
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@ -280,7 +280,7 @@ struct _EFI_SMM_SYSTEM_TABLE2 {
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///
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///
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/// I/O Service
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/// I/O Service
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///
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///
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EFI_SMM_CPU_IO_PROTOCOL SmmIo;
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EFI_SMM_CPU_IO2_PROTOCOL SmmIo;
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///
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///
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/// Runtime memory services
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/// Runtime memory services
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@ -1,96 +0,0 @@
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/** @file
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SMM CPU I/O protocol as defined in the PI 1.2 specification.
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This protocol provides CPU I/O and memory access within SMM.
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Copyright (c) 2009, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _SMM_CPU_IO_H_
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#define _SMM_CPU_IO_H_
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///
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/// Note:
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/// To avoid name conflict between PI and Framework SMM spec, the following names defined
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/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.
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///
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/// EFI_SMM_CPU_IO -> EFI_SMM_CPU_IO2
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/// EFI_SMM_IO_ACCESS -> EFI_SMM_IO_ACCESS2
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///
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#define EFI_SMM_CPU_IO_PROTOCOL_GUID \
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{ \
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0x3242A9D8, 0xCE70, 0x4AA0, { 0x95, 0x5D, 0x5E, 0x7B, 0x14, 0x0D, 0xE4, 0xD2 } \
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}
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typedef struct _EFI_SMM_CPU_IO_PROTOCOL EFI_SMM_CPU_IO_PROTOCOL;
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///
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/// Width of the SMM CPU I/O operations
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///
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typedef enum {
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SMM_IO_UINT8 = 0,
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SMM_IO_UINT16 = 1,
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SMM_IO_UINT32 = 2,
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SMM_IO_UINT64 = 3
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} EFI_SMM_IO_WIDTH;
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/**
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Provides the basic memory and I/O interfaces used toabstract accesses to devices.
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The I/O operations are carried out exactly as requested. The caller is responsible for any alignment
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and I/O width issues that the bus, device, platform, or type of I/O might require.
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@param[in] This The EFI_SMM_CPU_IO_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O operations.
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@param[in] Address The base address of the I/O operations.
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The caller is responsible for aligning the Address if required.
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@param[in] Count The number of I/O operations to perform.
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@param[in,out] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@retval EFI_SUCCESS The data was read from or written to the device.
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@retval EFI_UNSUPPORTED The Address is not valid for this system.
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@retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
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@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_SMM_CPU_IO2)(
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IN CONST EFI_SMM_CPU_IO_PROTOCOL *This,
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IN EFI_SMM_IO_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN OUT VOID *Buffer
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);
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typedef struct {
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///
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/// This service provides the various modalities of memory and I/O read.
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///
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EFI_SMM_CPU_IO2 Read;
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///
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/// This service provides the various modalities of memory and I/O write.
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///
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EFI_SMM_CPU_IO2 Write;
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} EFI_SMM_IO_ACCESS2;
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///
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/// SMM CPU I/O Protocol provides CPU I/O and memory access within SMM.
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///
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struct _EFI_SMM_CPU_IO_PROTOCOL {
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EFI_SMM_IO_ACCESS2 Mem; ///< Allows reads and writes to memory-mapped I/O space.
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EFI_SMM_IO_ACCESS2 Io; ///< Allows reads and writes to I/O space.
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};
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extern EFI_GUID gEfiSmmCpuIoProtocolGuid;
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#endif
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@ -0,0 +1,105 @@
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/** @file
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SMM CPU I/O 2 protocol as defined in the PI 1.2 specification.
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This protocol provides CPU I/O and memory access within SMM.
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Copyright (c) 2009 - 2010, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _SMM_CPU_IO2_H_
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#define _SMM_CPU_IO2_H_
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///
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/// Note:
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/// To avoid name conflict between PI and Framework SMM spec, the following names defined
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/// in PI 1.2 SMM spec are renamed.
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///
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/// *EFI_SMM_CPU_IO* -> *EFI_SMM_CPU_IO2*
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/// *EFI_SMM_IO_ACCESS* -> *EFI_SMM_IO_ACCESS2*
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///
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#define EFI_SMM_CPU_IO2_PROTOCOL_GUID \
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{ \
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0x3242A9D8, 0xCE70, 0x4AA0, { 0x95, 0x5D, 0x5E, 0x7B, 0x14, 0x0D, 0xE4, 0xD2 } \
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}
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typedef struct _EFI_SMM_CPU_IO2_PROTOCOL EFI_SMM_CPU_IO2_PROTOCOL;
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///
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/// Width of the SMM CPU I/O operations
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///
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typedef enum {
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SMM_IO_UINT8 = 0,
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SMM_IO_UINT16 = 1,
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SMM_IO_UINT32 = 2,
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SMM_IO_UINT64 = 3
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} EFI_SMM_IO_WIDTH;
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/**
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Provides the basic memory and I/O interfaces used toabstract accesses to devices.
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The I/O operations are carried out exactly as requested. The caller is
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responsible for any alignment and I/O width issues that the bus, device,
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platform, or type of I/O might require.
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@param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O operations.
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@param[in] Address The base address of the I/O operations. The caller is
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responsible for aligning the Address if required.
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@param[in] Count The number of I/O operations to perform.
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@param[in,out] Buffer For read operations, the destination buffer to store
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the results. For write operations, the source buffer
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from which to write data.
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@retval EFI_SUCCESS The data was read from or written to the device.
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@retval EFI_UNSUPPORTED The Address is not valid for this system.
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@retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
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@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack
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of resources.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_SMM_CPU_IO2)(
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IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
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IN EFI_SMM_IO_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN OUT VOID *Buffer
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);
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typedef struct {
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///
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/// This service provides the various modalities of memory and I/O read.
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///
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EFI_SMM_CPU_IO2 Read;
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///
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/// This service provides the various modalities of memory and I/O write.
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///
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EFI_SMM_CPU_IO2 Write;
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} EFI_SMM_IO_ACCESS2;
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///
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/// SMM CPU I/O Protocol provides CPU I/O and memory access within SMM.
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///
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struct _EFI_SMM_CPU_IO2_PROTOCOL {
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///
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/// Allows reads and writes to memory-mapped I/O space.
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///
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EFI_SMM_IO_ACCESS2 Mem;
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///
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/// Allows reads and writes to I/O space.
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///
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EFI_SMM_IO_ACCESS2 Io;
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};
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extern EFI_GUID gEfiSmmCpuIo2ProtocolGuid;
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#endif
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@ -4,7 +4,7 @@
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All assertions for bit field operations are handled bit field functions in the
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All assertions for bit field operations are handled bit field functions in the
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Base Library.
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Base Library.
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Copyright (c) 2009, Intel Corporation<BR>
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Copyright (c) 2009 - 2010, Intel Corporation<BR>
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All rights reserved. This program and the accompanying materials
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -13,8 +13,6 @@
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name: IoHighLevel.c
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The following IoLib instances share the same version of this file:
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The following IoLib instances share the same version of this file:
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BaseIoLibIntrinsic
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BaseIoLibIntrinsic
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@ -23,7 +21,6 @@
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SmmIoLibCpuIo
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SmmIoLibCpuIo
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**/
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**/
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#include "SmmCpuIoLibInternal.h"
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#include "SmmCpuIoLibInternal.h"
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/**
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/**
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@ -3,7 +3,7 @@
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The implementation of I/O operation for this library instance
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The implementation of I/O operation for this library instance
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are based on EFI_CPU_IO_PROTOCOL.
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are based on EFI_CPU_IO_PROTOCOL.
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Copyright (c) 2009, Intel Corporation<BR>
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Copyright (c) 2009 - 2010, Intel Corporation<BR>
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All rights reserved. This program and the accompanying materials
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All rights reserved. This program and the accompanying materials
|
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are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -12,18 +12,14 @@
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name: IoLib.c
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**/
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**/
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#include "SmmCpuIoLibInternal.h"
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#include "SmmCpuIoLibInternal.h"
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//
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//
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// Globle varible to cache pointer to CpuIo protocol.
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// Globle varible to cache pointer to CpuIo protocol.
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//
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//
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EFI_SMM_CPU_IO_PROTOCOL *mCpuIo = NULL;
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EFI_SMM_CPU_IO2_PROTOCOL *mCpuIo2 = NULL;
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EFI_SMM_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo = NULL;
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/**
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/**
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The constructor function caches the pointer to CpuIo protocol.
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The constructor function caches the pointer to CpuIo protocol.
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@ -46,10 +42,7 @@ IoLibConstructor (
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{
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{
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EFI_STATUS Status;
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EFI_STATUS Status;
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Status = gSmst->SmmLocateProtocol (&gEfiSmmPciRootBridgeIoProtocolGuid, NULL, (VOID **) &mPciRootBridgeIo);
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Status = gSmst->SmmLocateProtocol (&gEfiSmmCpuIo2ProtocolGuid, NULL, (VOID **) &mCpuIo2);
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if (EFI_ERROR (Status)) {
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Status = gSmst->SmmLocateProtocol (&gEfiSmmCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);
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}
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ASSERT_EFI_ERROR (Status);
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ASSERT_EFI_ERROR (Status);
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return Status;
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return Status;
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@ -79,11 +72,7 @@ IoReadWorker (
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EFI_STATUS Status;
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EFI_STATUS Status;
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UINT64 Data;
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UINT64 Data;
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if (mPciRootBridgeIo != NULL) {
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Status = mCpuIo2->Io.Read (mCpuIo2, Width, Port, 1, &Data);
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Status = mPciRootBridgeIo->Io.Read (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Port, 1, &Data);
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} else {
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Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
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}
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ASSERT_EFI_ERROR (Status);
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ASSERT_EFI_ERROR (Status);
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return Data;
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return Data;
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@ -114,11 +103,7 @@ IoWriteWorker (
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{
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{
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EFI_STATUS Status;
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EFI_STATUS Status;
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if (mPciRootBridgeIo != NULL) {
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Status = mCpuIo2->Io.Write (mCpuIo2, Width, Port, 1, &Data);
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Status = mPciRootBridgeIo->Io.Write (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Port, 1, &Data);
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} else {
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Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);
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}
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ASSERT_EFI_ERROR (Status);
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ASSERT_EFI_ERROR (Status);
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return Data;
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return Data;
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@ -148,11 +133,7 @@ MmioReadWorker (
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EFI_STATUS Status;
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EFI_STATUS Status;
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UINT64 Data;
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UINT64 Data;
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if (mPciRootBridgeIo != NULL) {
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Status = mCpuIo2->Mem.Read (mCpuIo2, Width, Address, 1, &Data);
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Status = mPciRootBridgeIo->Mem.Read (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Address, 1, &Data);
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} else {
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Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);
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}
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ASSERT_EFI_ERROR (Status);
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ASSERT_EFI_ERROR (Status);
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return Data;
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return Data;
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@ -183,11 +164,7 @@ MmioWriteWorker (
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{
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{
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EFI_STATUS Status;
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EFI_STATUS Status;
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if (mPciRootBridgeIo != NULL) {
|
Status = mCpuIo2->Mem.Write (mCpuIo2, Width, Address, 1, &Data);
|
||||||
Status = mPciRootBridgeIo->Mem.Write (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Address, 1, &Data);
|
|
||||||
} else {
|
|
||||||
Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);
|
|
||||||
}
|
|
||||||
ASSERT_EFI_ERROR (Status);
|
ASSERT_EFI_ERROR (Status);
|
||||||
|
|
||||||
return Data;
|
return Data;
|
|
@ -1,7 +1,7 @@
|
||||||
/** @file
|
/** @file
|
||||||
I/O Library MMIO Buffer Functions.
|
I/O Library MMIO Buffer Functions.
|
||||||
|
|
||||||
Copyright (c) 2009, Intel Corporation<BR>
|
Copyright (c) 2009 - 2010, Intel Corporation<BR>
|
||||||
All rights reserved. This program and the accompanying materials
|
All rights reserved. This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
|
@ -10,11 +10,8 @@
|
||||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
|
||||||
Module Name: IoLibMmioBuffer.c
|
|
||||||
|
|
||||||
**/
|
**/
|
||||||
|
|
||||||
|
|
||||||
#include "SmmCpuIoLibInternal.h"
|
#include "SmmCpuIoLibInternal.h"
|
||||||
|
|
||||||
/**
|
/**
|
|
@ -4,7 +4,7 @@
|
||||||
for implementation of IoLib library instance. It is included
|
for implementation of IoLib library instance. It is included
|
||||||
all source code of this library instance.
|
all source code of this library instance.
|
||||||
|
|
||||||
Copyright (c) 2009, Intel Corporation
|
Copyright (c) 2009 - 2010, Intel Corporation
|
||||||
All rights reserved. This program and the accompanying materials
|
All rights reserved. This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
|
@ -13,16 +13,13 @@
|
||||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
|
||||||
Module Name: DxeCpuIoLibInternal.h
|
|
||||||
|
|
||||||
**/
|
**/
|
||||||
|
|
||||||
#ifndef _SMM_CPUIO_LIB_INTERNAL_H_
|
#ifndef _SMM_CPUIO_LIB_INTERNAL_H_
|
||||||
#define _SMM_CPUIO_LIB_INTERNAL_H_
|
#define _SMM_CPUIO_LIB_INTERNAL_H_
|
||||||
|
|
||||||
|
|
||||||
#include <PiSmm.h>
|
#include <PiSmm.h>
|
||||||
#include <Protocol/SmmCpuIo.h>
|
#include <Protocol/SmmCpuIo2.h>
|
||||||
#include <Protocol/SmmPciRootBridgeIo.h>
|
#include <Protocol/SmmPciRootBridgeIo.h>
|
||||||
#include <Library/IoLib.h>
|
#include <Library/IoLib.h>
|
||||||
#include <Library/DebugLib.h>
|
#include <Library/DebugLib.h>
|
|
@ -3,7 +3,7 @@
|
||||||
#
|
#
|
||||||
# I/O Library implementation that uses the CPU I/O Protocol for I/O
|
# I/O Library implementation that uses the CPU I/O Protocol for I/O
|
||||||
# and MMIO operations.
|
# and MMIO operations.
|
||||||
# Copyright (c) 2009, Intel Corporation.
|
# Copyright (c) 2009 - 2010, Intel Corporation.
|
||||||
#
|
#
|
||||||
# All rights reserved. This program and the accompanying materials
|
# All rights reserved. This program and the accompanying materials
|
||||||
# are licensed and made available under the terms and conditions of the BSD License
|
# are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
@ -12,19 +12,16 @@
|
||||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
#
|
#
|
||||||
#
|
|
||||||
#**/
|
#**/
|
||||||
|
|
||||||
[Defines]
|
[Defines]
|
||||||
INF_VERSION = 0x00010005
|
INF_VERSION = 0x00010005
|
||||||
BASE_NAME = SmmIoLibCpuIo
|
BASE_NAME = SmmIoLibSmmCpuIo2
|
||||||
FILE_GUID = DEEEA15E-4A77-4513-BA75-71D26FEF78A1
|
FILE_GUID = DEEEA15E-4A77-4513-BA75-71D26FEF78A1
|
||||||
MODULE_TYPE = DXE_SMM_DRIVER
|
MODULE_TYPE = DXE_SMM_DRIVER
|
||||||
VERSION_STRING = 1.0
|
VERSION_STRING = 1.0
|
||||||
LIBRARY_CLASS = IoLib|DXE_SMM_DRIVER SMM_CORE
|
LIBRARY_CLASS = IoLib|DXE_SMM_DRIVER SMM_CORE
|
||||||
EFI_SPECIFICATION_VERSION = 0x00020000
|
|
||||||
PI_SPECIFICATION_VERSION = 0x0001000A
|
PI_SPECIFICATION_VERSION = 0x0001000A
|
||||||
|
|
||||||
CONSTRUCTOR = IoLibConstructor
|
CONSTRUCTOR = IoLibConstructor
|
||||||
|
|
||||||
#
|
#
|
||||||
|
@ -33,13 +30,12 @@
|
||||||
# VALID_ARCHITECTURES = IA32 X64
|
# VALID_ARCHITECTURES = IA32 X64
|
||||||
#
|
#
|
||||||
|
|
||||||
[Sources.common]
|
[Sources]
|
||||||
IoLibMmioBuffer.c
|
IoLibMmioBuffer.c
|
||||||
SmmCpuIoLibInternal.h
|
SmmCpuIoLibInternal.h
|
||||||
IoHighLevel.c
|
IoHighLevel.c
|
||||||
IoLib.c
|
IoLib.c
|
||||||
|
|
||||||
|
|
||||||
[Packages]
|
[Packages]
|
||||||
MdePkg/MdePkg.dec
|
MdePkg/MdePkg.dec
|
||||||
|
|
||||||
|
@ -49,8 +45,7 @@
|
||||||
SmmServicesTableLib
|
SmmServicesTableLib
|
||||||
|
|
||||||
[Protocols]
|
[Protocols]
|
||||||
gEfiSmmCpuIoProtocolGuid ## CONSUMES
|
gEfiSmmCpuIo2ProtocolGuid ## CONSUMES
|
||||||
gEfiSmmPciRootBridgeIoProtocolGuid ## CONSUMES
|
|
||||||
|
|
||||||
[Depex]
|
[Depex]
|
||||||
gEfiSmmCpuIoProtocolGuid OR gEfiSmmPciRootBridgeIoProtocolGuid
|
gEfiSmmCpuIo2ProtocolGuid
|
|
@ -5,7 +5,7 @@
|
||||||
# It also provides the definitions(including PPIs/PROTOCOLs/GUIDs) of
|
# It also provides the definitions(including PPIs/PROTOCOLs/GUIDs) of
|
||||||
# EFI1.10/UEFI2.0/UEFI2.1/PI1.0 and some Industry Standards.
|
# EFI1.10/UEFI2.0/UEFI2.1/PI1.0 and some Industry Standards.
|
||||||
#
|
#
|
||||||
# Copyright (c) 2007 - 2009, Intel Corporation.<BR>
|
# Copyright (c) 2007 - 2010, Intel Corporation.<BR>
|
||||||
# Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>
|
# Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>
|
||||||
#
|
#
|
||||||
# All rights reserved.
|
# All rights reserved.
|
||||||
|
@ -661,8 +661,8 @@
|
||||||
## Include/Protocol/SuperIo.h
|
## Include/Protocol/SuperIo.h
|
||||||
gEfiSioProtocolGuid = { 0x215fdd18, 0xbd50, 0x4feb, { 0x89, 0xb, 0x58, 0xca, 0xb, 0x47, 0x39, 0xe9 }}
|
gEfiSioProtocolGuid = { 0x215fdd18, 0xbd50, 0x4feb, { 0x89, 0xb, 0x58, 0xca, 0xb, 0x47, 0x39, 0xe9 }}
|
||||||
|
|
||||||
## Include/Protocol/SmmCpuIo.h
|
## Include/Protocol/SmmCpuIo2.h
|
||||||
gEfiSmmCpuIoProtocolGuid = { 0x3242a9d8, 0xce70, 0x4aa0, { 0x95, 0x5d, 0x5e, 0x7b, 0x14, 0x0d, 0xe4, 0xd2 }}
|
gEfiSmmCpuIo2ProtocolGuid = { 0x3242a9d8, 0xce70, 0x4aa0, { 0x95, 0x5d, 0x5e, 0x7b, 0x14, 0x0d, 0xe4, 0xd2 }}
|
||||||
|
|
||||||
## Include/Protocol/SmmBase2.h
|
## Include/Protocol/SmmBase2.h
|
||||||
gEfiSmmBase2ProtocolGuid = { 0xf4ccbfb7, 0xf6e0, 0x47fd, { 0x9d, 0xd4, 0x10, 0xa8, 0xf1, 0x50, 0xc1, 0x91 }}
|
gEfiSmmBase2ProtocolGuid = { 0xf4ccbfb7, 0xf6e0, 0x47fd, { 0x9d, 0xd4, 0x10, 0xa8, 0xf1, 0x50, 0xc1, 0x91 }}
|
||||||
|
|
|
@ -148,7 +148,7 @@
|
||||||
MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf
|
MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf
|
||||||
MdePkg/Library/SecPeiDxeTimerLibCpu/SecPeiDxeTimerLibCpu.inf
|
MdePkg/Library/SecPeiDxeTimerLibCpu/SecPeiDxeTimerLibCpu.inf
|
||||||
MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
|
MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
|
||||||
MdePkg/Library/SmmIoLibCpuIo/SmmIoLibCpuIo.inf
|
MdePkg/Library/SmmIoLibSmmCpuIo2/SmmIoLibSmmCpuIo2.inf
|
||||||
MdePkg/Library/SmmPciLibPciRootBridgeIo/SmmPciLibPciRootBridgeIo.inf
|
MdePkg/Library/SmmPciLibPciRootBridgeIo/SmmPciLibPciRootBridgeIo.inf
|
||||||
MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
|
MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue