mirror of https://github.com/acidanthera/audk.git
OvmfPkg/PlatformPei: hoist PciBase assignment above the i440fx/q35 branching
In the MemMapInitialization() function, we currently assign PciBase different values, on both branches of the board type check. Hoist the PciBase assignment from the i440fx branch in front of the "if". This is a no-op for the i440fx branch. On the q35 branch, we overwrite this value, hence the change is a no-op on q35 as well. This is another refactoring for simplifying the rest of this series. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1814 Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1666941 Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1701710 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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@ -181,6 +181,7 @@ MemMapInitialization (
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TopOfLowRam = GetSystemMemorySizeBelow4gb ();
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PciExBarBase = 0;
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PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
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if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
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//
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// The MMCONFIG area is expected to fall between the top of low RAM and
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@ -192,7 +193,6 @@ MemMapInitialization (
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PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
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PciSize = 0xFC000000 - PciBase;
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} else {
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PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
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PciSize = 0xFC000000 - PciBase;
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}
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