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ArmPkg/ArmGic: Implement GICv3+ version of GIC driver
Most platforms do not require the flexibility of the ordinary GIC driver, which supports both GICv2 and GICv3+, and decides at runtime which version to use. So expose a GICv3+ version, which only supports a GICv3 or newer. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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@ -126,6 +126,7 @@
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ArmPkg/Drivers/CpuPei/CpuPei.inf
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ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
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ArmPkg/Drivers/ArmGic/ArmGicV2Dxe.inf
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ArmPkg/Drivers/ArmGic/ArmGicV3Dxe.inf
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ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
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ArmPkg/Drivers/TimerDxe/TimerDxe.inf
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57
ArmPkg/Drivers/ArmGic/ArmGicV3Dxe.inf
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57
ArmPkg/Drivers/ArmGic/ArmGicV3Dxe.inf
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#/** @file
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#
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# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
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# Copyright (c) 2012 - 2017, ARM Ltd. All rights reserved.<BR>
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# Copyright (c) 2025, Google LLC. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#**/
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[Defines]
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INF_VERSION = 1.30
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BASE_NAME = ArmGicV3Dxe
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FILE_GUID = 953ff472-9b9e-4058-84cf-227daf89dc82
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MODULE_TYPE = DXE_DRIVER
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VERSION_STRING = 1.0
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ENTRY_POINT = GicV3DxeInitialize
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[Sources.common]
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ArmGicCommonDxe.c
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ArmGicDxe.c
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ArmGicDxe.h
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GicV3/ArmGicV3Dxe.c
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[Sources.ARM]
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GicV3/Arm/ArmGicV3.S | GCC
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[Sources.AARCH64]
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GicV3/AArch64/ArmGicV3.S
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[Packages]
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MdePkg/MdePkg.dec
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EmbeddedPkg/EmbeddedPkg.dec
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ArmPkg/ArmPkg.dec
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[LibraryClasses]
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ArmLib
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BaseLib
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DebugLib
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IoLib
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PcdLib
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PrintLib
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UefiBootServicesTableLib
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UefiDriverEntryPoint
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UefiLib
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[Protocols]
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gHardwareInterruptProtocolGuid ## PRODUCES
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gHardwareInterrupt2ProtocolGuid ## PRODUCES
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gEfiCpuArchProtocolGuid ## CONSUMES ## NOTIFY
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[Pcd.common]
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gArmTokenSpaceGuid.PcdGicDistributorBase
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gArmTokenSpaceGuid.PcdGicRedistributorsBase
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[Depex]
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TRUE
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@ -628,6 +628,7 @@ GicV3DxeInitialize (
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UINTN Index;
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UINT64 MpId;
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UINT64 CpuTarget;
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UINT64 RegValue;
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// Make sure the Interrupt Controller Protocol is not already installed in
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// the system.
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@ -637,6 +638,12 @@ GicV3DxeInitialize (
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mGicRedistributorsBase = PcdGet64 (PcdGicRedistributorsBase);
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mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
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RegValue = ArmGicV3GetControlSystemRegisterEnable ();
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if ((RegValue & ICC_SRE_EL2_SRE) == 0) {
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ArmGicV3SetControlSystemRegisterEnable (RegValue | ICC_SRE_EL2_SRE);
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ASSERT ((ArmGicV3GetControlSystemRegisterEnable () & ICC_SRE_EL2_SRE) != 0);
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}
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// We will be driving this GIC in native v3 mode, i.e., with Affinity
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// Routing enabled. So ensure that the ARE bit is set.
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MmioOr32 (mGicDistributorBase + ARM_GIC_ICDDCR, ARM_GIC_ICDDCR_ARE);
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