mirror of https://github.com/acidanthera/audk.git
Change function IpfFlushCacheRange() to AsmFlushCacheRange() follow the Mde_Lib_Spec.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6835 6f19259b-4bc3-4df7-8a09-765794883524
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@ -3694,7 +3694,7 @@ CpuDeadLoop (
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-1 is invalidated. This function may choose to invalidate the entire
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instruction cache if that is more efficient than invalidating the specified
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range. If Length is 0, the no instruction cache lines are invalidated.
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Address is returned.
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Address is returned. This function is only available on IPF.
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If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
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@ -3710,7 +3710,7 @@ CpuDeadLoop (
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**/
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VOID *
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EFIAPI
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IpfFlushCacheRange (
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AsmFlushCacheRange (
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IN VOID *Address,
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IN UINTN Length
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);
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@ -3722,7 +3722,7 @@ IpfFlushCacheRange (
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The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
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An implementation may flush a larger region. This function is only available on IPF.
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@param Address The Address of cache line to be flushed.
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@param Address The Address of cache line to be flushed.
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@return The address of FC instruction executed.
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@ -3740,7 +3740,7 @@ AsmFc (
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The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
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An implementation may flush a larger region. This function is only available on IPF.
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@param Address The Address of cache line to be flushed.
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@param Address The Address of cache line to be flushed.
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@return The address of FC.I instruction executed.
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@ -3761,7 +3761,7 @@ AsmFci (
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must either guarantee that Index is valid, or the caller must set up fault handlers to
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catch the faults. This function is only available on IPF.
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@param Index The 8-bit Processor Identifier Register index to read.
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@param Index The 8-bit Processor Identifier Register index to read.
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@return The current value of Processor Identifier Register specified by Index.
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@ -71,7 +71,7 @@ InvalidateInstructionCacheRange (
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IN UINTN Length
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)
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{
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return IpfFlushCacheRange (Address, Length);
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return AsmFlushCacheRange (Address, Length);
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}
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/**
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@ -128,7 +128,7 @@ WriteBackInvalidateDataCacheRange (
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{
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ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
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return IpfFlushCacheRange (Address, Length);
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return AsmFlushCacheRange (Address, Length);
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}
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/**
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@ -184,7 +184,7 @@ WriteBackDataCacheRange (
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{
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ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
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return IpfFlushCacheRange (Address, Length);
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return AsmFlushCacheRange (Address, Length);
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}
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/**
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@ -241,5 +241,5 @@ InvalidateDataCacheRange (
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IN UINTN Length
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)
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{
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return IpfFlushCacheRange (Address, Length);
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return AsmFlushCacheRange (Address, Length);
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}
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@ -31,7 +31,8 @@
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// containing Address + Length -1 is invalidated. This function may choose to
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// invalidate the entire instruction cache if that is more efficient than
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// invalidating the specified range. If Length is 0, the no instruction cache
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// lines are invalidated. Address is returned.
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// lines are invalidated. Address is returned.
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// This function is only available on IPF.
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//
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// If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
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//
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@ -46,12 +47,12 @@
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//
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// VOID *
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// EFIAPI
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// IpfFlushCacheRange (
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// AsmFlushCacheRange (
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// IN VOID *Address,
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// IN UINTN Length
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// );
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//
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PROCEDURE_ENTRY (IpfFlushCacheRange)
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PROCEDURE_ENTRY (AsmFlushCacheRange)
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NESTED_SETUP (5,8,0,0)
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@ -90,5 +91,5 @@ DoneFlushingC:
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mov r8 = in0 // return *Address
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NESTED_RETURN
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PROCEDURE_EXIT (IpfFlushCacheRange)
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PROCEDURE_EXIT (AsmFlushCacheRange)
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