DynamicTablesPkg: Move Cache info to Arch Common

Move the Cache info object from Arm Namespace to
the Arch Common namespace.

Correspondingly also update the following modules to reflect the
changes introduced by the move:
 - PPTT generator
 - ConfigurationManagerObjectParser
 - Dynamic Plat Repo TokenFixer map.

Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
This commit is contained in:
Sami Mujawar 2024-03-11 13:47:52 +00:00 committed by mergify[bot]
parent 79dd25848e
commit afa7f8a6b1
6 changed files with 80 additions and 81 deletions

View File

@ -37,6 +37,7 @@ typedef enum ArchCommonObjectID {
EArchCommonObjGenericInitiatorAffinityInfo, ///< 14 - Generic Initiator Affinity
EArchCommonObjLpiInfo, ///< 15 - Lpi Info
EArchCommonObjProcHierarchyInfo, ///< 16 - Processor Hierarchy Info
EArchCommonObjCacheInfo, ///< 17 - Cache Info
EArchCommonObjMax
} EARCH_COMMON_OBJECT_ID;
@ -401,6 +402,36 @@ typedef struct CmArchCommonProcHierarchyInfo {
UINT32 OverrideUid;
} CM_ARCH_COMMON_PROC_HIERARCHY_INFO;
/** A structure that describes the Cache Type Structure (Type 1) in PPTT
ID: EArchCommonObjCacheInfo
*/
typedef struct CmArchCommonCacheInfo {
/// A unique token used to identify this object
CM_OBJECT_TOKEN Token;
/// Reference token for the next level of cache that is private to the same
/// CM_ARCH_COMMON_PROC_HIERARCHY_INFO instance. A value of CM_NULL_TOKEN
/// means this entry represents the last cache level appropriate to the
/// processor hierarchy node structures using this entry.
CM_OBJECT_TOKEN NextLevelOfCacheToken;
/// Size of the cache in bytes
UINT32 Size;
/// Number of sets in the cache
UINT32 NumberOfSets;
/// Integer number of ways. The maximum associativity supported by
/// ACPI Cache type structure is limited to MAX_UINT8. However,
/// the maximum number of ways supported by the architecture is
/// PPTT_ARM_CCIDX_CACHE_ASSOCIATIVITY_MAX. Therfore this field
/// is 32-bit wide.
UINT32 Associativity;
/// Cache attributes (ACPI 6.4 - January 2021, PPTT, Table 5.140)
UINT8 Attributes;
/// Line size in bytes
UINT16 LineSize;
/// Unique ID for the cache
UINT32 CacheId;
} CM_ARCH_COMMON_CACHE_INFO;
#pragma pack()
#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_

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@ -48,19 +48,18 @@ typedef enum ArmObjectID {
EArmObjGicItsIdentifierArray, ///< 17 - GIC ITS Identifier Array
EArmObjIdMappingArray, ///< 18 - ID Mapping Array
EArmObjSmmuInterruptArray, ///< 19 - SMMU Interrupt Array
EArmObjCacheInfo, ///< 20 - Cache Info
EArmObjCmn600Info, ///< 21 - CMN-600 Info
EArmObjRmr, ///< 22 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 23 - Memory Range Descriptor
EArmObjCpcInfo, ///< 24 - Continuous Performance Control Info
EArmObjPccSubspaceType0Info, ///< 25 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType1Info, ///< 26 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 27 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType3Info, ///< 28 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 29 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 30 - Pcc Subspace Type 5 Info
EArmObjEtInfo, ///< 31 - Embedded Trace Extension/Module Info
EArmObjPsdInfo, ///< 32 - P-State Dependency (PSD) Info
EArmObjCmn600Info, ///< 20 - CMN-600 Info
EArmObjRmr, ///< 21 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 22 - Memory Range Descriptor
EArmObjCpcInfo, ///< 23 - Continuous Performance Control Info
EArmObjPccSubspaceType0Info, ///< 24 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType1Info, ///< 25 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 26 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType3Info, ///< 27 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 28 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 29 - Pcc Subspace Type 5 Info
EArmObjEtInfo, ///< 30 - Embedded Trace Extension/Module Info
EArmObjPsdInfo, ///< 31 - P-State Dependency (PSD) Info
EArmObjMax
} EARM_OBJECT_ID;
@ -644,36 +643,6 @@ typedef CM_ARCH_COMMON_GENERIC_INTERRUPT CM_ARM_SMMU_INTERRUPT;
*/
typedef CM_ARCH_COMMON_GENERIC_INTERRUPT CM_ARM_EXTENDED_INTERRUPT;
/** A structure that describes the Cache Type Structure (Type 1) in PPTT
ID: EArmObjCacheInfo
*/
typedef struct CmArmCacheInfo {
/// A unique token used to identify this object
CM_OBJECT_TOKEN Token;
/// Reference token for the next level of cache that is private to the same
/// CM_ARCH_COMMON_PROC_HIERARCHY_INFO instance. A value of CM_NULL_TOKEN
/// means this entry represents the last cache level appropriate to the
/// processor hierarchy node structures using this entry.
CM_OBJECT_TOKEN NextLevelOfCacheToken;
/// Size of the cache in bytes
UINT32 Size;
/// Number of sets in the cache
UINT32 NumberOfSets;
/// Integer number of ways. The maximum associativity supported by
/// ACPI Cache type structure is limited to MAX_UINT8. However,
/// the maximum number of ways supported by the architecture is
/// PPTT_ARM_CCIDX_CACHE_ASSOCIATIVITY_MAX. Therfore this field
/// is 32-bit wide.
UINT32 Associativity;
/// Cache attributes (ACPI 6.4 - January 2021, PPTT, Table 5.140)
UINT8 Attributes;
/// Line size in bytes
UINT16 LineSize;
/// Unique ID for the cache
UINT32 CacheId;
} CM_ARM_CACHE_INFO;
/** A structure that describes the CMN-600 hardware.
ID: EArmObjCmn600Info

View File

@ -33,7 +33,7 @@
Requirements:
The following Configuration Manager Object(s) are used by this Generator:
- EArchCommonObjProcHierarchyInfo (REQUIRED)
- EArmObjCacheInfo
- EArchCommonObjCacheInfo
- EArchCommonObjCmRef
- EArmObjGicCInfo (REQUIRED)
*/
@ -53,9 +53,9 @@ GET_OBJECT_LIST (
from the Configuration Manager.
*/
GET_OBJECT_LIST (
EObjNameSpaceArm,
EArmObjCacheInfo,
CM_ARM_CACHE_INFO
EObjNameSpaceArchCommon,
EArchCommonObjCacheInfo,
CM_ARCH_COMMON_CACHE_INFO
);
/**
@ -117,7 +117,7 @@ GET_SIZE_OF_PPTT_STRUCTS (
GET_SIZE_OF_PPTT_STRUCTS (
CacheTypeStructs,
sizeof (EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE),
CM_ARM_CACHE_INFO
CM_ARCH_COMMON_CACHE_INFO
);
/**
@ -788,7 +788,7 @@ AddCacheTypeStructures (
EFI_STATUS Status;
EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE *CacheStruct;
PPTT_NODE_INDEXER *PpttNodeFound;
CM_ARM_CACHE_INFO *CacheInfoNode;
CM_ARCH_COMMON_CACHE_INFO *CacheInfoNode;
PPTT_NODE_INDEXER *CacheNodeIterator;
UINT32 NodeCount;
BOOLEAN CacheIdUnique;
@ -814,7 +814,7 @@ AddCacheTypeStructures (
}
for (NodeIndex = 0; NodeIndex < NodeCount; NodeIndex++) {
CacheInfoNode = (CM_ARM_CACHE_INFO *)CacheNodeIterator->Object;
CacheInfoNode = (CM_ARCH_COMMON_CACHE_INFO *)CacheNodeIterator->Object;
// Populate the node header
CacheStruct->Type = EFI_ACPI_6_4_PPTT_TYPE_CACHE;
@ -1075,7 +1075,7 @@ BuildPpttTable (
UINT32 CacheStructOffset;
CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcHierarchyNodeList;
CM_ARM_CACHE_INFO *CacheStructList;
CM_ARCH_COMMON_CACHE_INFO *CacheStructList;
ACPI_PPTT_GENERATOR *Generator;
@ -1132,7 +1132,7 @@ BuildPpttTable (
// Get the cache info and update the processor topology structure count with
// Cache Type Structures (Type 1)
Status = GetEArmObjCacheInfo (
Status = GetEArchCommonObjCacheInfo (
CfgMgrProtocol,
CM_NULL_TOKEN,
&CacheStructList,

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@ -163,19 +163,18 @@ CM_OBJECT_TOKEN_FIXER TokenFixer[EArmObjMax] = {
NULL, ///< 17 - GIC ITS Identifier Array
NULL, ///< 18 - ID Mapping Array
NULL, ///< 19 - SMMU Interrupt Array
TokenFixerNotImplemented, ///< 21 - Cache Info
NULL, ///< 22 - CMN-600 Info
NULL, ///< 23 - Reserved Memory Range Node
NULL, ///< 24 - Memory Range Descriptor
NULL, ///< 25 - Continuous Performance Control Info
NULL, ///< 26 - Pcc Subspace Type 0 Info
NULL, ///< 27 - Pcc Subspace Type 2 Info
NULL, ///< 28 - Pcc Subspace Type 2 Info
NULL, ///< 29 - Pcc Subspace Type 3 Info
NULL, ///< 30 - Pcc Subspace Type 4 Info
NULL, ///< 31 - Pcc Subspace Type 5 Info
NULL, ///< 32 - Embedded Trace Extension/Module Info
NULL ///< 33 - P-State Dependency (PSD) Info
NULL, ///< 20 - CMN-600 Info
NULL, ///< 21 - Reserved Memory Range Node
NULL, ///< 22 - Memory Range Descriptor
NULL, ///< 23 - Continuous Performance Control Info
NULL, ///< 24 - Pcc Subspace Type 0 Info
NULL, ///< 25 - Pcc Subspace Type 2 Info
NULL, ///< 26 - Pcc Subspace Type 2 Info
NULL, ///< 27 - Pcc Subspace Type 3 Info
NULL, ///< 28 - Pcc Subspace Type 4 Info
NULL, ///< 29 - Pcc Subspace Type 5 Info
NULL, ///< 30 - Embedded Trace Extension/Module Info
NULL ///< 31 - P-State Dependency (PSD) Info
};
/** CmObj token fixer.

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@ -337,9 +337,9 @@ STATIC CONST CM_OBJ_PARSER CmArchCommonProcHierarchyInfoParser[] = {
{ "OverrideUid", 4, "0x%x", NULL }
};
/** A parser for EArmObjCacheInfo.
/** A parser for EArchCommonObjCacheInfo.
*/
STATIC CONST CM_OBJ_PARSER CmArmCacheInfoParser[] = {
STATIC CONST CM_OBJ_PARSER CmArchCommonCacheInfoParser[] = {
{ "Token", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
{ "NextLevelOfCacheToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
{ "Size", 4, "0x%x", NULL },
@ -687,6 +687,7 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArchCommonNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArchCommonObjGenericInitiatorAffinityInfo,CmArchCommonGenericInitiatorAffinityInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjLpiInfo, CmArchCommonLpiInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjProcHierarchyInfo, CmArchCommonProcHierarchyInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjCacheInfo, CmArchCommonCacheInfoParser),
CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax)
};
@ -713,7 +714,6 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArmObjGicItsIdentifierArray, CmArmGicItsIdentifierParser),
CM_PARSER_ADD_OBJECT (EArmObjIdMappingArray, CmArmIdMappingParser),
CM_PARSER_ADD_OBJECT (EArmObjSmmuInterruptArray, CmArchCommonGenericInterruptParser),
CM_PARSER_ADD_OBJECT (EArmObjCacheInfo, CmArmCacheInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjCmn600Info, CmArmCmn600InfoParser),
CM_PARSER_ADD_OBJECT (EArmObjRmr, CmArmRmrInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjMemoryRangeDescriptor, CmArmMemoryRangeDescriptorInfoParser),

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@ -460,19 +460,18 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 17 | GIC ITS Identifier Array | |
| 18 | ID Mapping Array | |
| 19 | SMMU Interrupt Array | |
| 20 | Cache Info | Move to Arch Common NS |
| 21 | CMN 600 Info | |
| 22 | Reserved Memory Range Node | |
| 23 | Memory Range Descriptor | |
| 24 | Continuous Performance Control Info | Move to Arch Common NS |
| 25 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 26 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 27 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 28 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 29 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 30 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 31 | Embedded Trace Extension/Module Info | |
| 32 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| 20 | CMN 600 Info | |
| 21 | Reserved Memory Range Node | |
| 22 | Memory Range Descriptor | |
| 23 | Continuous Performance Control Info | Move to Arch Common NS |
| 24 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 25 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 26 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 27 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 28 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 29 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 30 | Embedded Trace Extension/Module Info | |
| 31 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| `*` | All other values are reserved. | |
#### Object ID's in the Arch Common Namespace:
@ -496,5 +495,6 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 14 | Generic Initiator Affinity Info | |
| 15 | Low Power Idle State Info | |
| 16 | Processor Hierarchy Info | |
| 17 | Cache Info | |
| `*` | All other values are reserved. | |