mirror of https://github.com/acidanthera/audk.git
DynamicTablesPkg: Move Cache info to Arch Common
Move the Cache info object from Arm Namespace to the Arch Common namespace. Correspondingly also update the following modules to reflect the changes introduced by the move: - PPTT generator - ConfigurationManagerObjectParser - Dynamic Plat Repo TokenFixer map. Cc: Pierre Gondois <Pierre.Gondois@arm.com> Cc: Yeo Reum Yun <YeoReum.Yun@arm.com> Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com> Cc: Jeshua Smith <jeshuas@nvidia.com> Cc: Jeff Brasen <jbrasen@nvidia.com> Cc: Girish Mahadevan <gmahadevan@nvidia.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
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@ -37,6 +37,7 @@ typedef enum ArchCommonObjectID {
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EArchCommonObjGenericInitiatorAffinityInfo, ///< 14 - Generic Initiator Affinity
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EArchCommonObjLpiInfo, ///< 15 - Lpi Info
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EArchCommonObjProcHierarchyInfo, ///< 16 - Processor Hierarchy Info
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EArchCommonObjCacheInfo, ///< 17 - Cache Info
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EArchCommonObjMax
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} EARCH_COMMON_OBJECT_ID;
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@ -401,6 +402,36 @@ typedef struct CmArchCommonProcHierarchyInfo {
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UINT32 OverrideUid;
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} CM_ARCH_COMMON_PROC_HIERARCHY_INFO;
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/** A structure that describes the Cache Type Structure (Type 1) in PPTT
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ID: EArchCommonObjCacheInfo
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*/
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typedef struct CmArchCommonCacheInfo {
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/// A unique token used to identify this object
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CM_OBJECT_TOKEN Token;
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/// Reference token for the next level of cache that is private to the same
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/// CM_ARCH_COMMON_PROC_HIERARCHY_INFO instance. A value of CM_NULL_TOKEN
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/// means this entry represents the last cache level appropriate to the
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/// processor hierarchy node structures using this entry.
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CM_OBJECT_TOKEN NextLevelOfCacheToken;
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/// Size of the cache in bytes
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UINT32 Size;
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/// Number of sets in the cache
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UINT32 NumberOfSets;
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/// Integer number of ways. The maximum associativity supported by
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/// ACPI Cache type structure is limited to MAX_UINT8. However,
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/// the maximum number of ways supported by the architecture is
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/// PPTT_ARM_CCIDX_CACHE_ASSOCIATIVITY_MAX. Therfore this field
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/// is 32-bit wide.
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UINT32 Associativity;
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/// Cache attributes (ACPI 6.4 - January 2021, PPTT, Table 5.140)
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UINT8 Attributes;
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/// Line size in bytes
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UINT16 LineSize;
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/// Unique ID for the cache
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UINT32 CacheId;
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} CM_ARCH_COMMON_CACHE_INFO;
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#pragma pack()
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#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_
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@ -48,19 +48,18 @@ typedef enum ArmObjectID {
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EArmObjGicItsIdentifierArray, ///< 17 - GIC ITS Identifier Array
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EArmObjIdMappingArray, ///< 18 - ID Mapping Array
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EArmObjSmmuInterruptArray, ///< 19 - SMMU Interrupt Array
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EArmObjCacheInfo, ///< 20 - Cache Info
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EArmObjCmn600Info, ///< 21 - CMN-600 Info
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EArmObjRmr, ///< 22 - Reserved Memory Range Node
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EArmObjMemoryRangeDescriptor, ///< 23 - Memory Range Descriptor
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EArmObjCpcInfo, ///< 24 - Continuous Performance Control Info
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EArmObjPccSubspaceType0Info, ///< 25 - Pcc Subspace Type 0 Info
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EArmObjPccSubspaceType1Info, ///< 26 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType2Info, ///< 27 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType3Info, ///< 28 - Pcc Subspace Type 3 Info
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EArmObjPccSubspaceType4Info, ///< 29 - Pcc Subspace Type 4 Info
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EArmObjPccSubspaceType5Info, ///< 30 - Pcc Subspace Type 5 Info
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EArmObjEtInfo, ///< 31 - Embedded Trace Extension/Module Info
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EArmObjPsdInfo, ///< 32 - P-State Dependency (PSD) Info
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EArmObjCmn600Info, ///< 20 - CMN-600 Info
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EArmObjRmr, ///< 21 - Reserved Memory Range Node
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EArmObjMemoryRangeDescriptor, ///< 22 - Memory Range Descriptor
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EArmObjCpcInfo, ///< 23 - Continuous Performance Control Info
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EArmObjPccSubspaceType0Info, ///< 24 - Pcc Subspace Type 0 Info
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EArmObjPccSubspaceType1Info, ///< 25 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType2Info, ///< 26 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType3Info, ///< 27 - Pcc Subspace Type 3 Info
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EArmObjPccSubspaceType4Info, ///< 28 - Pcc Subspace Type 4 Info
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EArmObjPccSubspaceType5Info, ///< 29 - Pcc Subspace Type 5 Info
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EArmObjEtInfo, ///< 30 - Embedded Trace Extension/Module Info
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EArmObjPsdInfo, ///< 31 - P-State Dependency (PSD) Info
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EArmObjMax
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} EARM_OBJECT_ID;
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@ -644,36 +643,6 @@ typedef CM_ARCH_COMMON_GENERIC_INTERRUPT CM_ARM_SMMU_INTERRUPT;
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*/
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typedef CM_ARCH_COMMON_GENERIC_INTERRUPT CM_ARM_EXTENDED_INTERRUPT;
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/** A structure that describes the Cache Type Structure (Type 1) in PPTT
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ID: EArmObjCacheInfo
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*/
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typedef struct CmArmCacheInfo {
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/// A unique token used to identify this object
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CM_OBJECT_TOKEN Token;
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/// Reference token for the next level of cache that is private to the same
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/// CM_ARCH_COMMON_PROC_HIERARCHY_INFO instance. A value of CM_NULL_TOKEN
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/// means this entry represents the last cache level appropriate to the
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/// processor hierarchy node structures using this entry.
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CM_OBJECT_TOKEN NextLevelOfCacheToken;
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/// Size of the cache in bytes
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UINT32 Size;
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/// Number of sets in the cache
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UINT32 NumberOfSets;
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/// Integer number of ways. The maximum associativity supported by
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/// ACPI Cache type structure is limited to MAX_UINT8. However,
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/// the maximum number of ways supported by the architecture is
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/// PPTT_ARM_CCIDX_CACHE_ASSOCIATIVITY_MAX. Therfore this field
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/// is 32-bit wide.
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UINT32 Associativity;
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/// Cache attributes (ACPI 6.4 - January 2021, PPTT, Table 5.140)
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UINT8 Attributes;
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/// Line size in bytes
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UINT16 LineSize;
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/// Unique ID for the cache
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UINT32 CacheId;
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} CM_ARM_CACHE_INFO;
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/** A structure that describes the CMN-600 hardware.
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ID: EArmObjCmn600Info
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@ -33,7 +33,7 @@
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Requirements:
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The following Configuration Manager Object(s) are used by this Generator:
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- EArchCommonObjProcHierarchyInfo (REQUIRED)
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- EArmObjCacheInfo
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- EArchCommonObjCacheInfo
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- EArchCommonObjCmRef
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- EArmObjGicCInfo (REQUIRED)
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*/
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@ -53,9 +53,9 @@ GET_OBJECT_LIST (
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from the Configuration Manager.
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*/
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GET_OBJECT_LIST (
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EObjNameSpaceArm,
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EArmObjCacheInfo,
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CM_ARM_CACHE_INFO
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EObjNameSpaceArchCommon,
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EArchCommonObjCacheInfo,
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CM_ARCH_COMMON_CACHE_INFO
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);
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/**
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@ -117,7 +117,7 @@ GET_SIZE_OF_PPTT_STRUCTS (
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GET_SIZE_OF_PPTT_STRUCTS (
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CacheTypeStructs,
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sizeof (EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE),
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CM_ARM_CACHE_INFO
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CM_ARCH_COMMON_CACHE_INFO
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);
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/**
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@ -788,7 +788,7 @@ AddCacheTypeStructures (
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EFI_STATUS Status;
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EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE *CacheStruct;
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PPTT_NODE_INDEXER *PpttNodeFound;
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CM_ARM_CACHE_INFO *CacheInfoNode;
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CM_ARCH_COMMON_CACHE_INFO *CacheInfoNode;
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PPTT_NODE_INDEXER *CacheNodeIterator;
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UINT32 NodeCount;
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BOOLEAN CacheIdUnique;
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@ -814,7 +814,7 @@ AddCacheTypeStructures (
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}
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for (NodeIndex = 0; NodeIndex < NodeCount; NodeIndex++) {
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CacheInfoNode = (CM_ARM_CACHE_INFO *)CacheNodeIterator->Object;
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CacheInfoNode = (CM_ARCH_COMMON_CACHE_INFO *)CacheNodeIterator->Object;
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// Populate the node header
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CacheStruct->Type = EFI_ACPI_6_4_PPTT_TYPE_CACHE;
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@ -1075,7 +1075,7 @@ BuildPpttTable (
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UINT32 CacheStructOffset;
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CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcHierarchyNodeList;
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CM_ARM_CACHE_INFO *CacheStructList;
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CM_ARCH_COMMON_CACHE_INFO *CacheStructList;
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ACPI_PPTT_GENERATOR *Generator;
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@ -1132,7 +1132,7 @@ BuildPpttTable (
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// Get the cache info and update the processor topology structure count with
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// Cache Type Structures (Type 1)
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Status = GetEArmObjCacheInfo (
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Status = GetEArchCommonObjCacheInfo (
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CfgMgrProtocol,
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CM_NULL_TOKEN,
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&CacheStructList,
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@ -163,19 +163,18 @@ CM_OBJECT_TOKEN_FIXER TokenFixer[EArmObjMax] = {
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NULL, ///< 17 - GIC ITS Identifier Array
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NULL, ///< 18 - ID Mapping Array
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NULL, ///< 19 - SMMU Interrupt Array
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TokenFixerNotImplemented, ///< 21 - Cache Info
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NULL, ///< 22 - CMN-600 Info
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NULL, ///< 23 - Reserved Memory Range Node
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NULL, ///< 24 - Memory Range Descriptor
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NULL, ///< 25 - Continuous Performance Control Info
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NULL, ///< 26 - Pcc Subspace Type 0 Info
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NULL, ///< 27 - Pcc Subspace Type 2 Info
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NULL, ///< 28 - Pcc Subspace Type 2 Info
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NULL, ///< 29 - Pcc Subspace Type 3 Info
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NULL, ///< 30 - Pcc Subspace Type 4 Info
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NULL, ///< 31 - Pcc Subspace Type 5 Info
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NULL, ///< 32 - Embedded Trace Extension/Module Info
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NULL ///< 33 - P-State Dependency (PSD) Info
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NULL, ///< 20 - CMN-600 Info
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NULL, ///< 21 - Reserved Memory Range Node
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NULL, ///< 22 - Memory Range Descriptor
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NULL, ///< 23 - Continuous Performance Control Info
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NULL, ///< 24 - Pcc Subspace Type 0 Info
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NULL, ///< 25 - Pcc Subspace Type 2 Info
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NULL, ///< 26 - Pcc Subspace Type 2 Info
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NULL, ///< 27 - Pcc Subspace Type 3 Info
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NULL, ///< 28 - Pcc Subspace Type 4 Info
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NULL, ///< 29 - Pcc Subspace Type 5 Info
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NULL, ///< 30 - Embedded Trace Extension/Module Info
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NULL ///< 31 - P-State Dependency (PSD) Info
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};
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/** CmObj token fixer.
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@ -337,9 +337,9 @@ STATIC CONST CM_OBJ_PARSER CmArchCommonProcHierarchyInfoParser[] = {
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{ "OverrideUid", 4, "0x%x", NULL }
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};
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/** A parser for EArmObjCacheInfo.
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/** A parser for EArchCommonObjCacheInfo.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmCacheInfoParser[] = {
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STATIC CONST CM_OBJ_PARSER CmArchCommonCacheInfoParser[] = {
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{ "Token", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
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{ "NextLevelOfCacheToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
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{ "Size", 4, "0x%x", NULL },
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@ -687,6 +687,7 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArchCommonNamespaceObjectParser[] = {
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CM_PARSER_ADD_OBJECT (EArchCommonObjGenericInitiatorAffinityInfo,CmArchCommonGenericInitiatorAffinityInfoParser),
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CM_PARSER_ADD_OBJECT (EArchCommonObjLpiInfo, CmArchCommonLpiInfoParser),
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CM_PARSER_ADD_OBJECT (EArchCommonObjProcHierarchyInfo, CmArchCommonProcHierarchyInfoParser),
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CM_PARSER_ADD_OBJECT (EArchCommonObjCacheInfo, CmArchCommonCacheInfoParser),
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CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax)
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};
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@ -713,7 +714,6 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
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CM_PARSER_ADD_OBJECT (EArmObjGicItsIdentifierArray, CmArmGicItsIdentifierParser),
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CM_PARSER_ADD_OBJECT (EArmObjIdMappingArray, CmArmIdMappingParser),
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CM_PARSER_ADD_OBJECT (EArmObjSmmuInterruptArray, CmArchCommonGenericInterruptParser),
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CM_PARSER_ADD_OBJECT (EArmObjCacheInfo, CmArmCacheInfoParser),
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CM_PARSER_ADD_OBJECT (EArmObjCmn600Info, CmArmCmn600InfoParser),
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CM_PARSER_ADD_OBJECT (EArmObjRmr, CmArmRmrInfoParser),
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CM_PARSER_ADD_OBJECT (EArmObjMemoryRangeDescriptor, CmArmMemoryRangeDescriptorInfoParser),
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@ -460,19 +460,18 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
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| 17 | GIC ITS Identifier Array | |
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| 18 | ID Mapping Array | |
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| 19 | SMMU Interrupt Array | |
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| 20 | Cache Info | Move to Arch Common NS |
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| 21 | CMN 600 Info | |
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| 22 | Reserved Memory Range Node | |
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| 23 | Memory Range Descriptor | |
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| 24 | Continuous Performance Control Info | Move to Arch Common NS |
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| 25 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
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| 26 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
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| 27 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
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| 28 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
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| 29 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
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| 30 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
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| 31 | Embedded Trace Extension/Module Info | |
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| 32 | P-State Dependency (PSD) Info | Move to Arch Common NS |
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| 20 | CMN 600 Info | |
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| 21 | Reserved Memory Range Node | |
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| 22 | Memory Range Descriptor | |
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| 23 | Continuous Performance Control Info | Move to Arch Common NS |
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| 24 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
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| 25 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
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| 26 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
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| 27 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
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| 28 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
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| 29 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
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| 30 | Embedded Trace Extension/Module Info | |
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| 31 | P-State Dependency (PSD) Info | Move to Arch Common NS |
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| `*` | All other values are reserved. | |
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#### Object ID's in the Arch Common Namespace:
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@ -496,5 +495,6 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
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| 14 | Generic Initiator Affinity Info | |
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| 15 | Low Power Idle State Info | |
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| 16 | Processor Hierarchy Info | |
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| 17 | Cache Info | |
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| `*` | All other values are reserved. | |
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