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UefiCpuPkg: Add macro definitions for CET feature for NASM files. 

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Cc: Tan Dun <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Sheng Wei 2023-11-15 10:31:33 +08:00 committed by mergify[bot]
parent ff4c49a5ee
commit b5f20eca8a
1 changed files with 26 additions and 0 deletions
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UefiCpuPkg/PiSmmCpuDxeSmm/Cet.inc Normal file
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;------------------------------------------------------------------------------
;
; Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Abstract:
;
; This file provides macro definitions for CET feature for NASM files.
;
;------------------------------------------------------------------------------
%define MSR_IA32_U_CET 0x6A0
%define MSR_IA32_S_CET 0x6A2
%define MSR_IA32_CET_SH_STK_EN (1<<0)
%define MSR_IA32_CET_WR_SHSTK_EN (1<<1)
%define MSR_IA32_CET_ENDBR_EN (1<<2)
%define MSR_IA32_CET_LEG_IW_EN (1<<3)
%define MSR_IA32_CET_NO_TRACK_EN (1<<4)
%define MSR_IA32_CET_SUPPRESS_DIS (1<<5)
%define MSR_IA32_CET_SUPPRESS (1<<10)
%define MSR_IA32_CET_TRACKER (1<<11)
%define MSR_IA32_PL0_SSP 0x6A4
%define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8
%define CR4_CET_BIT 23
%define CR4_CET (1<<CR4_CET_BIT)