ArmPkg/PL390Gic: Introduced PcdGicSgiIntId to define which SGI is used for core synchronisation

By default this PCD is set to use SGI #0.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13123 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/ArmPkg.dec

@@ -83,6 +83,7 @@
   gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
   gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
+  gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025
 
   #
   # ARM Secure Firmware PCDs

ArmPkg/Drivers/PL390Gic/PL390Gic.c

@@ -15,6 +15,7 @@
 #include <Uefi.h>
 #include <Library/IoLib.h>
 #include <Library/ArmGicLib.h>
+#include <Library/PcdLib.h>
 
 VOID
 EFIAPI
@@ -24,7 +25,7 @@ ArmGicSendSgiTo (
   IN  INTN          CPUTargetList
   )
 {
-  MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16));
+  MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | PcdGet32(PcdGicSgiIntId));
 }
 
 UINT32
@@ -39,7 +40,7 @@ ArmGicAcknowledgeSgiFrom (
   InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
 
   // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
-  if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {
+  if ((((CoreId & 0x7) << 10) | PcdGet32(PcdGicSgiIntId)) == InterruptId) {
     // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
     MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
     return 1;

ArmPkg/Drivers/PL390Gic/PL390GicLib.inf

@@ -26,3 +26,6 @@
 [Packages]
   ArmPkg/ArmPkg.dec
   MdePkg/MdePkg.dec
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdGicSgiIntId

ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf

@@ -34,4 +34,4 @@
 
 [FixedPcd.common]
   gArmTokenSpaceGuid.PcdGicNumInterrupts
-  
+  gArmTokenSpaceGuid.PcdGicSgiIntId