ArmPkg/PL390Gic: Introduced PcdGicSgiIntId to define which SGI is used for core synchronisation

By default this PCD is set to use SGI #0.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13123 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2012-03-26 10:46:25 +00:00
parent 9253410646
commit be613c8b2c
4 changed files with 8 additions and 3 deletions

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@ -83,6 +83,7 @@
gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023 gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025
# #
# ARM Secure Firmware PCDs # ARM Secure Firmware PCDs

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@ -15,6 +15,7 @@
#include <Uefi.h> #include <Uefi.h>
#include <Library/IoLib.h> #include <Library/IoLib.h>
#include <Library/ArmGicLib.h> #include <Library/ArmGicLib.h>
#include <Library/PcdLib.h>
VOID VOID
EFIAPI EFIAPI
@ -24,7 +25,7 @@ ArmGicSendSgiTo (
IN INTN CPUTargetList IN INTN CPUTargetList
) )
{ {
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16)); MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | PcdGet32(PcdGicSgiIntId));
} }
UINT32 UINT32
@ -39,7 +40,7 @@ ArmGicAcknowledgeSgiFrom (
InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR); InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
// Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) { if ((((CoreId & 0x7) << 10) | PcdGet32(PcdGicSgiIntId)) == InterruptId) {
// Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId); MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
return 1; return 1;

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@ -26,3 +26,6 @@
[Packages] [Packages]
ArmPkg/ArmPkg.dec ArmPkg/ArmPkg.dec
MdePkg/MdePkg.dec MdePkg/MdePkg.dec
[FixedPcd]
gArmTokenSpaceGuid.PcdGicSgiIntId

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@ -34,4 +34,4 @@
[FixedPcd.common] [FixedPcd.common]
gArmTokenSpaceGuid.PcdGicNumInterrupts gArmTokenSpaceGuid.PcdGicNumInterrupts
gArmTokenSpaceGuid.PcdGicSgiIntId