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ArmPkg/PL390Gic: Introduced PcdGicSgiIntId to define which SGI is used for core synchronisation
By default this PCD is set to use SGI #0. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13123 6f19259b-4bc3-4df7-8a09-765794883524
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@ -83,6 +83,7 @@
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gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
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gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
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gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
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gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
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gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025
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#
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#
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# ARM Secure Firmware PCDs
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# ARM Secure Firmware PCDs
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@ -15,6 +15,7 @@
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#include <Uefi.h>
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#include <Uefi.h>
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#include <Library/IoLib.h>
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#include <Library/IoLib.h>
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#include <Library/ArmGicLib.h>
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#include <Library/ArmGicLib.h>
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#include <Library/PcdLib.h>
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VOID
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VOID
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EFIAPI
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EFIAPI
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@ -24,7 +25,7 @@ ArmGicSendSgiTo (
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IN INTN CPUTargetList
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IN INTN CPUTargetList
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)
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)
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{
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{
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MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16));
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MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | PcdGet32(PcdGicSgiIntId));
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}
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}
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UINT32
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UINT32
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@ -39,7 +40,7 @@ ArmGicAcknowledgeSgiFrom (
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InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
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InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
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// Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
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// Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
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if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {
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if ((((CoreId & 0x7) << 10) | PcdGet32(PcdGicSgiIntId)) == InterruptId) {
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// Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
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// Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
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MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
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MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
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return 1;
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return 1;
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@ -26,3 +26,6 @@
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[Packages]
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[Packages]
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ArmPkg/ArmPkg.dec
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ArmPkg/ArmPkg.dec
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MdePkg/MdePkg.dec
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MdePkg/MdePkg.dec
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[FixedPcd]
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gArmTokenSpaceGuid.PcdGicSgiIntId
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@ -34,4 +34,4 @@
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[FixedPcd.common]
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[FixedPcd.common]
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gArmTokenSpaceGuid.PcdGicNumInterrupts
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gArmTokenSpaceGuid.PcdGicNumInterrupts
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gArmTokenSpaceGuid.PcdGicSgiIntId
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