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UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors. 

On AMD processors the second SendIpi in the SendInitSipiSipi and
SendInitSipiSipiAllExcludingSelf routines is not required, and may cause
undesired side-effects during MP initialization.

This patch leverages the StandardSignatureIsAuthenticAMD check to exclude
the second SendIpi and its associated MicroSecondDelay (200).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leo Duran <leo.duran@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
This commit is contained in:
Eric Dong 2018-06-19 13:15:39 +08:00
parent aeb6f57625
commit bf252e29a5
2 changed files with 16 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
View File

@ -554,8 +554,10 @@ SendInitSipiSipi (
IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP; IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
IcrLow.Bits.Level = 1; IcrLow.Bits.Level = 1;
SendIpi (IcrLow.Uint32, ApicId); SendIpi (IcrLow.Uint32, ApicId);
if (!StandardSignatureIsAuthenticAMD ()) {
MicroSecondDelay (200); MicroSecondDelay (200);
SendIpi (IcrLow.Uint32, ApicId); SendIpi (IcrLow.Uint32, ApicId);
}
} }
/** /**
@ -588,8 +590,10 @@ SendInitSipiSipiAllExcludingSelf (
IcrLow.Bits.Level = 1; IcrLow.Bits.Level = 1;
IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF; IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
SendIpi (IcrLow.Uint32, 0); SendIpi (IcrLow.Uint32, 0);
if (!StandardSignatureIsAuthenticAMD ()) {
MicroSecondDelay (200); MicroSecondDelay (200);
SendIpi (IcrLow.Uint32, 0); SendIpi (IcrLow.Uint32, 0);
}
} }
/** /**

4
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
View File

@ -649,8 +649,10 @@ SendInitSipiSipi (
IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP; IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
IcrLow.Bits.Level = 1; IcrLow.Bits.Level = 1;
SendIpi (IcrLow.Uint32, ApicId); SendIpi (IcrLow.Uint32, ApicId);
if (!StandardSignatureIsAuthenticAMD ()) {
MicroSecondDelay (200); MicroSecondDelay (200);
SendIpi (IcrLow.Uint32, ApicId); SendIpi (IcrLow.Uint32, ApicId);
}
} }
/** /**
@ -683,8 +685,10 @@ SendInitSipiSipiAllExcludingSelf (
IcrLow.Bits.Level = 1; IcrLow.Bits.Level = 1;
IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF; IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
SendIpi (IcrLow.Uint32, 0); SendIpi (IcrLow.Uint32, 0);
if (!StandardSignatureIsAuthenticAMD ()) {
MicroSecondDelay (200); MicroSecondDelay (200);
SendIpi (IcrLow.Uint32, 0); SendIpi (IcrLow.Uint32, 0);
}
} }
/** /**